Press Release

Resiltech and Andes Technology are pleased to announce a strategic collaboration to deliver advanced Software Test Library (STL) solutions for Andes’ automotive-grade RISC-V processor IP!

Andes Technology is pleased to announce its participation in RISC-V Summit Europe 2024, the prestigious annual event held from June 24 to 28, 2024, in Munich.

“ANDES RISC-V CON: Deep Dive into Automotive/AI/Application Processors and Security Trends,” promises an exhilarating journey into the RISC-V advancements. With over 300 registered attendees, this conference is set to be an industry luminary event, bringing together top-tier experts, researchers, and industry leaders for riveting discussions and groundbreaking insights.

Andes Technology announces that Rain AI, a pioneer in compute-in-memory (CIM) technology, licensed Andes’ AX45MPV RISC-V vector processor. Rain AI designs novel accelerator solutions, and the two companies are collaborating to accelerate Rain AI’s product roadmap.

Andes today announced the QiLai SoC and the Voyager development board to further accelerate the development and porting of large RISC-V applications.

Andes Technology and Arteris, Inc. today announced their partnership to advance innovation for RISC-V based SoC designs for AI, 5G, networking, mobile, storage, AIoT and space applications.

Andes, HiRain, and HPMicro jointly announced that the three parties will cooperate to combine the AndesCoreTM RISC-V processor series, the HPMicro HPM6200 full line of products, and the HiRain Vehicle OS software platform solutions to jointly build the RISC-V ecosystem in the field of automotive electronics.

TASKING proudly announces that its ISO 26262 (functional safety) and ISO/SAE 21434 (cybersecurity) compliant compilers now fully support the Andes FuSa certified RISC-V IP.

Andes Technology (TWSE: 6533), since the first agreement signed with National Chiao Tung University in 2010, has actively keeping engaged in industry-academia collaboration. Collaborating with universities across Europe, Asia, and US over a decade, Andes has signed agreements with over 80 universities worldwide.

Andes Technology since the first agreement signed with National Chiao Tung University in 2010, has actively keeping engaged in industry-academia collaboration. Collaborating with universities across Europe, Asia, and US over a decade, Andes has signed agreements with over 80 universities worldwide.

MachineWare lends its support by seamlessly integrating AndesCore™ AX45MPV into their SIM-V high-performance simulation solution, enabling software developers to efficiently handle intricate AI and Linux stack related workloads!

RISC-V IP vendor Andes Technology and edge computing chip provider MetaSilicon jointly announced that the MetaSilicon MAT Series is the world’s first automotive-grade CMOS image sensor series using RISC-V IP SoC, using Andes’ AndesCore™ N25F-SE processor.

Andes Technology and Spacetouch Technology today jointly announced AndesCore™ D25F has been adopted by the SPV60 series as the edge-side audio processor, a perfect integration of traditional and intelligent audio, and introducing a new generation of on-device AI audio processors.

Andes Technology today proudly announces general availability of the high-performance AndesCore™ AX65 out-of-order superscalar multicore processor IP. The AX65 is the first of the high-performance out-of-order AX60 series.