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RISC-V International Association (formerly as RISC-V Foundation) was established in 2015. Andes joined it in the first year and is a Founding and Premier member. In addition to the company’s own patented AndeStar™ V3 instruction set architecture, Andes released a new generation instruction set, AndeStar™ V5, based on the RISC-V architecture in 2017. To meet the strict requirements of today’s electronic equipment, Andes provides highly configurable 32/64-bit efficient CPU cores, including DSP, FPU, Vector, Superscalar and multi-core series, which are used in a wide variety of applications. Andes also provides a full-featured integrated development environment and comprehensive software/hardware solutions to help customers innovate their SoC designs in a short time. By the end of 2023, Andes Technology’s CPU IP licenses have exceeded 300 globally, the AndeSight™ integrated development software suite has nearly 100,000 users, and the total cumulative shipments of AndesCore™-embedded SoCs have exceeded 14 billion.

After joining the RISC-V International Association as a founding member, Andes has leveraged its rich expertise and experiences in CPU IP design and development to focus on developing RISC-V processor IP across a range of performant points and tailored architecture and feature sets for various segments. Currently, system chips built with Andes cores are widely used in 5G, ADAS, AR/VR, artificial intelligence, audio, Bluetooth devices, cloud computing, data centers, GPS, IoT, sensor fusion, SSD, USB 3.0 devices, video games, touch screens, voice recognition, Wi-Fi, wireless charging, etc. Andes will continue to maintain its market and technology leadership in RISC-V and work with its broad ecosystem partners to make RISC-V as the mainstream computing architecture.