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Overview

Andes joined the RISC-V International Association (formerly known as the RISC-V Foundation) as a founding member in 2016 and became a premier member in 2020. In addition to the company’s own patented AndeStar™ V3 instruction set architecture, Andes released a new generation instruction set, AndeStar™ V5, based on the RISC-V architecture in 2017. To meet the strict requirements of today’s electronic equipment, Andes provides highly configurable 32/64-bit efficient CPU cores, including DSP, FPU, Vector, Superscalar and multi-core series, which are used in a wide variety of applications. Andes also provides a full-featured integrated development environment and comprehensive software/hardware solutions to help customers innovate their SoC designs in a short time. To date, Andes Technology’s CPU IP has exceeded 300 licenses worldwide, the AndeSight™ integrated development software suite has been installed more than 87,000 times, and the cumulative total shipments of SoCs embedded with AndesCore™ have reached 12 billion units. 

After joining the RISC-V International Association as a founding member, Andes has leveraged its rich expertise and experiences in CPU IP design and development to focus on developing RISC-V processor IP across a range of performant points and tailored architecture and feature sets for various segments. Currently, system chips built with Andes cores are widely used in 5G, ADAS, AR/VR, artificial intelligence, audio, Bluetooth devices, cloud computing, data centers, GPS, IoT, sensor fusion, SSD, USB 3.0 devices, video games, touch screens, voice recognition, Wi-Fi, wireless charging, etc. Andes will continue to maintain its market and technology leadership in RISC-V and work with its broad ecosystem partners to make RISC-V as the mainstream computing architecture.