Andes Technology Unveils the Annual ANDES RISC-V CON, Scheduled for June 27th at the San Jose Airport DoubleTree Hotel


RISC-V: Redefining AI’s Future in Automotive, Data Center, Communications, and IoT

San Jose, CA — June 27, 2023 — Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, announces its annual ANDES RISC-V CON on June 27th at the San Jose Airport DoubleTree Hotel. In 2023, the reputable conference in the RISC-V field will focus on the theme of “RISC-V: Redefining AI’s Future in Automotive, Data Center, Communications, and IoT.” The event serves as a nexus for eminent experts, accomplished researchers, and prominent industry leaders to engage in insightful discussions regarding the latest breakthroughs in RISC-V, and the total number of registered attendees has exceeded 500.

The ANDES RISC-V CON offers an exceptional program featuring insightful presentations from Philipp Tomsich, Chair, RISC-V Software Committee; Sanjay Dave,  TSMC; Barna Ibrahim, Vice Chair, RISE Project; Adil Kidwai, EdgeQ; Larry Lapides, Imperas; Chuck Brokish, Green Hills; Shawn Prestridge, IAR. The event also includes informative technical panel: Open-Source Is Transforming AI And Hardware, involving key partners in the RISC-V ecosystem. The moderator is Dylan Patel, Chief Analyst, SemiAnalysis and panelists are Andrew Feldman, Cerebras; Horace He, Meta, Charlie Cheng, Polyhedron, Raja Khoduri, Stealth Startup and Jim Keller, Tenstorrent. Their discussion will focus on the future of AI and hardware through the lens of open-source.

The event will commence at 9:30 AM with a welcome address from Andes Technology‘s Chairman and CEO, Frankwell Lin. It will delve into the RISC-V trend and shed light on the significant contributions made by Andes in enabling the realization of the RISC-V community’s achievements. Furthermore, Dr. Charlie Su, President & CTO of Andes Technology will have the keynote “Firing on All Cylinders with Andes RISC-V Processors.” When RISC-V has been adopted in diverse applications from tiny MCUs, Linux-capable MPUs, 5G networking, enterprise storage to AI/ML accelerators with novel technologies such as compute-in-memory and photonics, the speech will give an overview of Andes RISC-V processor lineup and showcase examples of recently disclosed RISC-V applications powered by AndesCore™. In the afternoon session, Samuel Chiang, Deputy Director of Marketing of Andes Technology will also give a talk “Exploring Latest Andes RISC-V Products for Automotive and AIoT. 

The exhibition held alongside the conference program will showcase an exciting range of technological advancements. Attendees will have the opportunity to explore the Tinker V, the first RISC-V Single-Board Computer (SBC) from ASUS IoT; an MPU development board from Renesas; an AI development kit with a camera module from Canaan; the IT9836 TDDI demo board from ITE; the PC802SCB 5G small cell reference design from Picocom; Bluetooth development kit from Telink incorporating Andes RISC-V CPU IP. Besides, there are also global leading companies to have booths and demos in Andes RISC-V CON, including EdgeQ, Gowin, Green Hills, IAR, Imperas, Menta, QuickLogic, Rapid Silicon, RISE, Siemens, Tetramem and TSMC.

ANDES RISC-V CON serves as an excellent platform for RISC-V enthusiasts to engage in personalized conversations with the knowledgeable experts worldwide. Running from 9:30 AM to 5:00 PM, the conference program ensures a comprehensive experience that encompasses a lunch and a delightful evening reception. After the Q&A sessions following the final presentation, lucky participants will have a chance to win one of two Meta VR headset and one of two Beats Earbuds. The conference is free of charge and is available to qualified registrants, including design engineers, engineering managers, marketing professionals, and business development personnel.

To register, click

If you can’t attend in person, the event will be livestreamed. E-mail for the Livestream link.

ANDES RISC- V CON is the annual RISC-V technology forum of Andes Technology. In 2023, the San Jose session will be held in Doubletree by Hilton Hotel on June 27. The 2023 theme is “RISC-V: Redefining AI’s Future in Automotive, Data Center, Communications, and IoT.” It will introduce the flexible RISC-V that changes the face of emerging computing and share how Andes assists the RISC-V ecosystem in implementing multiple applications of innovative technology. Three popular application areas will be focused on: AI, automotive electronics, and RISC-V’s new field, Android. Many RISC-V ecosystem partners, including TSMC, are invited to give talks and on-site demonstrations. For free registration, please see the official website of Andes RISC-V CON:

About Andes Technology

Eighteen years in business and a Founding Premier member of RISC-V International, Andes is a publicly-listed company (TWSE: 6533SIN: US03420C2089ISIN: US03420C1099), a leading supplier of high-performance/ low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit Out-of-Order processors with DSP, FPU, Vector, Linux, superscalar, and/or multi/many-core capabilities. By the end of 2022, the cumulative volume of Andes-Embedded™ SoCs has surpassed 12 billion. For more information, please visit Follow Andes on LinkedIn, Facebook, Twitter, Bilibili and YouTube