Press Release Archives - Page 15 of 18

Andes Technology Forms New Internet of Things Community Knect.me to Provide Open-Source and Commercial IoT Solutions based on AndesCore™ processors

Post author:aaronzhang
Post published:2015-06-15
Post category:Press Release

Knect.me Partner Solutions Enable SoC Developers to Build Highly Competitive IoT Products to Meet Narrow, Fast-Moving Product Windows

【Taiwan Hsinchu】– Andes Technology Corporation, the leading Asia-based supplier of small, low-power, high performance 32-bit embedded CPU cores, today announced knect.me, the new Internet of Things community that provides open-source and commercial solutions for connected devices based on the highly performance-efficient AndesCore processors. Knect.me community partners provide the SoC development platforms, software stacks, application development platforms, and development tools SoC developers need to build highly competitive IoT products to meet narrow, fast moving product windows.

“IoT is a diversified market with great potential. In the past year, many partners have approached Andes seeking partnership,” said Charlie Hong-Men Su, Ph.D. Andes Technology CTO and Senior Vice President of R&D. “Because we know that it takes multiple companies cooperating to fully exploit a market potential. Andes would like to contribute to the expansion of the IoT market by providing enabling resources for developers. With this motivation in mind, we created a new website knect.me. The site will connect chip vendors, partners, applications developers, and system vendors related to IoT. Knect.me will also bring together solutions for silicon IP’s, software stacks, tools, applications, and systems to help develop products that will connect to the world.”

In addition to the knect.me community, Andes is also creating the “IoT League.” The league will showcase successful products that have been developed through the knect.me community. “We’re inviting Andes’ customers to provide information on their products that contain AndesCore IP,” said Frankwell Jyh-Ming Lin, Andes Technology President. “In return, IoT League participants will receive greater exposure and enhanced reputation in the IoT market. By showcasing a broad expanding array of applications, new prospects will be attracted to adopt Andes customers’ products and solutions.”

About Knect.me solution
The Knect SoC Development Platform solution comprises the AndesCore™, Andes platform IP, and partners’ IPs. The Knect Software Stack provides choices of open source software, and production-proven, certified and optimized software by Andes partners to fulfill a wide range of smart products and emerging applications development requirements. The Knect Application Development Platforms include both FPGA based prototyping boards and ASIC based rapid development boards. The Knect Development Tools include the AndeSight IDE Lite and the open source GNU toolchain for AndesCores. AndeSight™ Lite is a compact version of the Eclipse-based AndeSight™ IDE for free download. It comes with all major functionality up to a code size limitation of 32KB.

Availability
The knect.me community website is available immediately at http://www.knect.me, or simply knect.me. For information about joining the knect.me community or to participate in the partnership program or IoT League, contact knectme@andestech.com

Andes CPU Core Small Die Area and Low Power Consumption Wins New Socket in MediaTek SoCs

Post author:aaronzhang
Post published:2015-05-29
Post category:Press Release

Andes Technology Corporation, the leader in developing easy to integrate, scalable, and configurable CPUs and platforms, announced this month that MediaTek Inc., a leading fabless semiconductor company, has adopted the AndesCore™ N9 CPU IP in their SoCs. The AndesCore™ N9 is intended for deeply embedded applications that require optimal interrupt response time, efficient performance and compact code size, including wireless networking and sensors.

“We are thrilled that AndesCore N9 was selected for use in the MediaTek SoCs,” said Dr. Charlie Su, Chief Technical Officer and SVP of R&D at Andes. “The N9 dramatically reduces the instruction memory size and cost of the SoC through higher code density, when compared to legacy 8- or 16-bit MCUs. Despite the N9’s compact size, it still provides more than 40 percent better performance than competing 32-bit processor cores to enable functionality such as 802.11 drivers and TCP/IP protocol stack for network applications, GPIO and PWM for intelligent control, as well as UART and SPI interfaces for device communication.”

According to market analyst BI (Business Intelligence), smart home device shipments will grow faster than smart phones or other portable devices, at a compound annual rate of 67 percent for the next five years. The market research firm expects as many as 1.8 billion units to ship in 2019, including safety and security devices such as internet-connected sensors, monitors, cameras, and alarm systems and energy management components such as smart thermostats and lights. As Andes customers produce SoCs for this market opportunity, embedded processors such as the N9 will continue to see strong demand.

Andes Unleashes AndeSight™ v2.1.0 IDEs, Offering Mature Development Suites to Satisfy Diversified Requirements

Post author:aaronzhang
Post published:2015-04-17
Post category:Press Release

Andes and eMemory Announce New IC Security Solutions For IoT Security Applications

Post author:aaronzhang
Post published:2015-03-30
Post category:Press Release

【Hsinchu, Taiwan.】 – The rapid development of Internet-of-Things (IoT) offers advanced interconnection between various devices and systems. As consumers place greater concern on data security and protection mechanism, the demands for related IC security solutions increase simultaneously. Targeting the market demands, eMemory Technology, the logic non-volatile memory (Logic NVM) and silicon intellectual property (Silicon IP) industry leader, partnered with Andes Technology Corporation, the first developer of original 32-bit microprocessor IP and system IC design in Asia, to launch new IC security solutions for IoT security applications market.

The AndesCore™ S801 secure 32-bit processor elevates the safety of data transfer and storage in embedded applications. Applying AndesCore™ S801 in System-on-Chip (SOC) designs along with eMemory’s one-time programmable (OTP) silicon IPs for security key storage in IoT products, the data security can be greatly enhanced at the minimum cost. Therefore, the new security MCU solutions find the perfect balance between information security and product cost, which can greatly benefit customers to exploit the boundless business opportunities offered by IoT.

To take the lead in the IoT market, the data security of IC hardware and firmware is crucial. Targeting the market potential, Andes launches the AndesCore™ S8 series products which equip with compact 3-stage pipeline and protected command set for diverse password and anti-tampering applications. Apart from comprehensive protocols for access control, the AndesCore™ S801 also features an energy-saving core and a secure memory protection unit (Secure MPU), offering hardware protection for program codes and data to prevent side-channel attacks.

The AndesCore™ S801 is fully conforming to the latest SoC designs. It can facilitate customers’ product development and certification approval process, as well as reduce time-to-market; making it the best choice for secure products which emphasize lightweight, compact size, and low-power consumption designs. AndesCore™ S801 can be widely applied in various applications to provide security mechanism and added-value, such as NFC, smart cards, bank cards, health cards, e-passports, smart meters, sensor hubs, smart locks, smart home, and the wearables.

Unlike conventional ICs with metal-fuse or poly-fuse based architectures, eMemory’s Logic NVM IPs use floating-gate and anti-fuse structures to prevent reverse-engineering, hence effectively protect data from detection and interpolation to enhance information security. The advanced security level of eMemory’s NeoFuse silicon IP has been recognized by the Conditional Access (CA) certification. Moreover, eMemory OTP silicon IPs offer 125℃/10 years industry-grade high-temperature data retention ability, which are ideal for products with strict operational conditions and performance demands.

eMemory’s Logic NVM IPs are fully compatible with generic CMOS processes without additional mask layers. They have been extensively deployed in 0.5um~16nm process platforms at worldwide foundries; which offer customers not only a wide range of platform choices for product planning and validation, but also high flexibility of production capacity to maximize manufacturing competitiveness.

The strategic alliance of Andes and eMemory will provide customers competitive advantages to exploit opportunities in the growing IoT market, and further expand application ranges into mobile payments, smart home, automotive electronics, and cloud data centers. Combining the low-cost, low-power consumption, and high-security benefits of AndesCore™ S801 32-bit processor with eMemory OTP silicon IPs’ cost-effective, high-reliability, high-temperature data retention features, and diverse platforms availabilities; both parties can assist their partners to develop high-end security products to take the lead in the global market.

About eMemory
eMemory (Stock Code: 3529) is a global leader in logic process embedded non-volatile memory (eNVM) silicon IP. Since established in 2000, eMemory has been devoted to research and development of innovative technologies, offering the industry’s most comprehensive platforms of patented eNVM IP solutions include NeoBit (OTP silicon IP), NeoFuse (anti-fuse OTP silicon IP), NeoMTP (1,000+ times programmable silicon IP), NeoFlash (10,000+ times programmable silicon IP), and NeoEE (100,000+ times programmable silicon IP) to semiconductor foundries, integrated devices manufacturers (IDMs) and fabless design houses worldwide. eMemory’s eNVM silicon IPs support a wide range of applications include trimming, function selection, code storage, parameter setting, encryption, and identification setting. The company has the world’s largest NVM engineering team and prides itself on providing partners a full-service solution that sees the integration of eMemory eNVM IP from initial design stages through fabrication. For more information about eMemory, please visit www.ememory.com.tw

Press Contact
eMemory Technology Inc.
Public Relations Department
Michelle Wang
Phone: +886-3-5601168 #1121
Email: michelle@eMemory.com.tw

Hycon Technology Selects Andes N8 CPU Core for Next Generation High End 24-bit Analog-to-Digital Converter

Post author:aaronzhang
Post published:2015-03-01
Post category:Press Release

Andes N8 High Performance, Low Power and Low Cost Helps Hycon
24-bit ADC’s Competitiveness in the Health Care Device Market

Andes Technology Corporation today announced that Hycon Technology Corporation, based in Taipei City Taiwan, selected the Andes high performance, low gate count, low power architecture N8 32-bit processor core for Hycon’s next generation high-end 24-bit Analog-to-Digital Converter (ADC). The Andes core helps Hycon’s higher resolution 24-bit ADC achieve a competitive advantage in the demanding and rapid growth health care device market of digital scales, blood pressure and insulin monitors, wearables, and other devices that monitor chronic medical conditions outside the hospital.

“Andes Technology provided Hycon with on-time and effective technical support and service that ensured our design team’s schedule was maintained as we integrated the Andes core into our new 24-bit ADC design,” Hsu Wen-Yee, Senior Director at Hycon Technology said, “and their excellent support helped reduce our time to market. While Andes is a newer CPU IP supplier in the industry, the company’s strong and continued insistence on self-discipline, growth, eagerness to listen to customers, and continuous hardware and software improvements makes them a partner worthy to engage with in the long term.”

“We are extremely pleased that Hycon chose the Andes N8 processor core for their next generation 24-bit ADC product,” said Frankwell Lin, President of Andes. “In the field of healthcare applications such as glucose meter, digital weight scale, temperature sensor, etc., Hycon has achieved international tier-1 status in terms of quality and performance. In the future, Andes will continue to devote ourselves to providing excellent products and superior technical service to all our customers. By creating a win-win business engagement with our customers, we can grow together and help one another succeed.”

About the Medical Electronics Market
“The growing $85-$90 billion Medical electronics market is being driven by a change in health care models away from reactionary care where chronically ill patients require expensive hospital treatment to a more preventative model using modern technology,” said Stephen Holloway Associate Director, Medical Devices, IHS Technology of El Segundo, Calif. “The new opportunities of digital technology is to take patients out of the hospital into the home setting. And use things like smart networks, cloud computing, to be able to monitor those patients remotely. That’s really driving some significant demand for new systems and technology in medical.”

About the N8 CPU Core
SoC designs for IoT devices demand low cost and low power consumption in combination with high performance to handle compute intensive functions such as processing sensor data and wireless protocol stacks. The efficient AndeStar™ Instruction Set Architecture enables superior 32-bit performance with lower power consumption than and gate-count equivalent to an older 8-bit processor. The three-stage pipelined N8 works with separate flash acceleration IP called FlashFetch that boosts performance without consuming added power. The key component of FlashFetch consists of a small amount of buffer near the processor core that enables repetitive functions to be executed efficiently thus eliminating power consuming flash memory accesses

A three-stage variant of the N8, the S8, features the AndeStar V3m architecture with Security Extension Micro Profile, which enables a secure microcomputer core with code and data protection from physical attacks and password-protected debugging. Another variant of the N8 core, called E8, is equipped with the unique Andes Custom Extension(ACE). The E8 enables designers to create custom instructions that differentiate their designs from competitive offerings that are based on standard instruction set processors. By adding special instructions, not easily discoverable by hackers, ACE can provide even stronger security to a design. The E8 also delivers 1.82 DMIPS per MHz of performance, while consuming far less power than 32-bit competitive alternatives.

Weltrend Adopts AndesCore™ N801 For Booming Brushless DC Motor Control Market

Post author:aaronzhang
Post published:2015-01-15
Post category:Press Release

Small Gate Count and High Performance
Key to AndesCore N801 Winning Weltrend Design

Andes Technology Inc. the leader in developing easy to integrate, scalable, and configurable CPU intellectual property (IP) and platforms today announced that Weltrend Semiconductor, a leading fabless semiconductor company has adopted the AndesCore N801CPU IP for a new system on chip (SoC) targeting the expanding brushless DC motor (BLDC) controller market. The N801’s small gate count—less than 14k gates—and high performance—1.36 DMIP/MHz at 300MHz operating frequency—beat out competitive alternatives to win the business.

Saving die area with a small gate count while providing high performance provides Weltrend’s SoC a competitive advantage as it competes for a large share of the booming electric motor control market. “The worldwide market for electric motors is expected to be worth an estimated US$120.68 billion by 2019, growing at a 6.3 percent compound annual growth rate from 2013 to 2019,” predicted the market research report titled “Electric Motors Market (AC motors, DC motors, Hermetic motors) – Global Industry Analysis, Size, Share, Growth, Trends and Forecast, 2013 – 2019,” from Transparency Market Research.

“Electric motors have a wide area of applications in numerous industries and functions such as motor vehicles, household appliances, industrial machinery, aerospace and other transportation equipment, HVAC equipments, and commercial industry,” the report claims. Furthermore, the research asserts that growth is greatest in Weltrend’s home market. “Asia-Pacific is the fastest-growing and largest regional market for electric motors owing to improving economies and rising purchasing power in countries such as India, Malaysia, China, and Indonesia.”

“Andes has been a valued supplier of CPU IP since 2009,” said Chao-Chee Ku, Ph.D., Director of Product Planning & FAE of Weltrend. “Andes has continually provided Weltrend the high quality technical support we need to design best-in-class system-on-chip solutions for our customers. Andes’ N801 CPU core helped Weltrend fulfills the market needs as well as our customers’ requirements.”

“AndesCore processor families are based on a young architecture developed in the last 10 years with emerging market requirements in mind,” said Frankwell Lin, President of Andes. “Not bound by the need to remain compatible by years of applications, Andes developed a product line of high performance, small size, and low power CPU cores including the N801 with its 3-stage pipeline design. These cores boosts the execution efficiency of today’s computation algorithms, reduces memory usage, lowers customers’ silicon cost, while providing a long-term roadmap for customers needing an upgrade path from 8-bit cores used up to now.”

About Weltrend Semiconductor
Weltrend Semiconductor is a leading fabless semiconductor company, based in Hsinchu, Taiwan, specializing in the planning, design, testing, application development and distribution of its IC products. The company is a leading developer of analog and mixed-signal/digital IC design. It has accumulated enormous technical expertise over the years with a rich digital/analog IP portfolio and has expanded its products to advanced applications spanning across video signal processing, high-efficiency BLDC motor control, data security, vital sign detection, and digital power.

Andes Technology Unveils New Low-Power Platform IP Ideal for Internet-of-Things, Wearable Devices and other Power-Sensitive Applications

Post author:aaronzhang
Post published:2014-09-01
Post category:Press Release

【HsinChu Taiwan】Andes Technology (www.andestech.com), Asia’s first dedicated vendor of 32-bit CPU cores and associated System-on-Chip (SoC) platforms, unveiled a new low-power SoC subsystem for expanding Internet-of-Things (IoT) and wearable device markets. Called the AndeShape™ AE210P, this configurable and highly efficient IP, can be easily integrated with any AndesCore™ or those from other IP vendors and is ideally suited for a variety of popular MCU applications where power considerations are critical. These include: smart sensor devices, medical devices, intelligent appliances, touch panels, wireless charging and power management ICs.

“Power efficiency is critical for many emerging applications,” commented Rich Wawrzyniak, Senior Market Analyst with Semico Research. “More and more SOCs are being designed with subsystems that solve a larger part of the design challenge. By introducing a lower-power solution, Andes is servicing an increasingly important market need.”

The AE210P provides flexible and diverse configurations, giving customers the options to select and tune peripheral IPs for meeting their unique design requirements. For example, if cost is the highest consideration, designers can choose the simplified bus structure of a single APB to support basic peripheral IPs, with a gate count as low as 11K. When pursuing the optimum performance and the best throughput, they can have an AHB bus matrix plus the APB bus. In terms of peripheral IPs, the AE210P allows versatile combination from DMA controller, PWM, watchdog timer, Real Time Clock (RTC), UART controller, SPI controller, I2C Controller and bus controllers for AHB master/slave and APB. These bus controllers, bridge controllers and peripheral IPs are all designed to maximize the system performance and minimize the access latency, logic gate count, power consumption and cost. With the AE210P already silicon-proven, customers can confidently integrate their modules through the provided interfaces and focus on their part of the designs. This also dramatically boosts the efficiency and quality in product development and shortens time-to-market.

“32-bit MCU products are penetrating the consumer market at a frantic pace,” remarked Dr. Charlie Su, Chief Technical Officer and Senior VP of R&D at Andes. “The AE210P provides a pre-verified and pre-integrated platform IP that contains common functions required for many MCU applications – with reduced power. Using the standard TSMC 90nm LP library, the AE210P can deliver frequencies up to 200 MHz for high-performance applications, while power consumption can be as little as 98uW (82uA) for low power mode. This makes it an ideal platform for IoT and wearable devices that demand ultra-low-power consumption for long battery life. The AE210P also enables customers to meet efficiency requirements and speed up their development process. These benefits are easily demonstrated by its access acceleration for NOR Flash, a typical memory among various MCU applications. It not only offers Serial Peripheral Interface (SPI) for direct program execution from Serial Flash, but also employs the FlashFetch™ technology to accelerate the access time from Parallel Flash.”

Dr. Su further states, “Using the AE210P, customers can complete their SoC designs with ease by integrating their modules with the platform, greatly shortening the development time. For developers with strong needs for SoC optimization, the AE210P also allows configuration for respective peripheral IP. Such flexibility provides significant benefits for companies moving from 8- or 16-bit MCUs to 32-bit MCUs. The combination of the AE210P with AndesCore™ CPU IPs is fully supported by the AndeSight™ IDE and BSP components like toolchains, demo applications and real-time operating systems such as FreeRTOS, ThreadX, and uc/OS-II. As a softcore platform, the AE210P fits in any semiconductor manufacturing processes. Andes also provides an FPGA development board for performance evaluation and software development too. All in all, the AE210P plays a key role in Andes’ 32-bit MCU total solution covering hardware, software and two-wire ICE debugger. For suppliers of MCU applications and system manufacturers, it is integral to create competitive products with optimum performance and reduced cost.”

“Our ThreadX RTOS is an ideal match for the power-conscious AE210P, with our small memory footprint and highly efficient code,” commented William E. Lamie, President of Express Logic, Inc. “ThreadX is used in over 2 billion electronic products in the areas of consumer electronics, medical devices, and industrial control equipment. ThreadX supports IoT development for wearable and portable devices based on the AE210P, that require efficient, high-performance, and easy-to-use operation.”

For more details about Andes 32-bit CPU IPs, please visit www.andestech.com.

AndesCore™ N968A: the Optimal Choice for Developers in Pursuit of High Performance and Low Power Consumption

Post author:aaronzhang
Post published:2014-07-18
Post category:Press Release

【Taiwan HsinChu】As 32-bit MCU devices are sprouting in the consumer electronic market, suppliers keep pursuing higher integration and greater energy saving while speeding up the release of new products. Following this trend, Andes Technology Corporation, Asia’s first dedicated vendor of innovative 32-bit CPU IPs and associated SoC platforms, launches the AndesCore™ N968A IP core. This licensable solution is tailored for MCU applications that demand a combination of high performance and low power consumption. With its outstanding performance, the N968A has already been embedded in SoCs for high volume fields like touch panel control, three-phase motor control, mobile health devices, computer peripherals, white goods, personal care devices, handheld devices and wireless networking.

The N968A delivers an impressive performance of 1.92 DMIPS/MHz with dynamic power consumption of only 31.7 uW/MHz. With the resulting power efficiency of 60.6 DMIPS/mW, the N968A provides significant benefits for developing low-power, high performance SoCs. By employing breakthrough technologies such as hardware configurability and the latest AndeStar™ V3 instruction set architecture, chip vendors get rich peripheral integration and superior efficiency while minimizing cost. Using Andes’ novel V3 architecture, the N968A achieves optimum system efficiency with minimum code size and power consumption. Moreover, the N968A features advanced power management capabilities and incorporates rich bus interface for either AHB or AXI, meeting the control requirements of next-generation applications.

Dr. Charlie Su, Chief Technical Officer and Senior VP of R&D at Andes, states, “Whether using Flash or ROM the instruction memory on typical MCU-based chips often consumes at least twice the size of processor. Thus it is memory that typically dictates the size – and the cost – of MCU-based chips. The N968A dramatically reduces the instruction memory size and cost through higher code density, especially when compared to legacy 8- or 16-bit MCUs. By combining exceptional performance with very low power consumption, the N968A delivers excellent power efficiency, outperforming 8-bit MCUs by at least three times and offering more than 40% efficiency boost over the competing 32-bit MCUs. For chip designs which used to adopt 8 or 16-bit MCUs, the 32-bit N968A provides a seamlessly update and makes a great improvement in all aspects. Andes’ N968A is a must-have to create competitive products with low cost and high efficiency.”

Andes Custom Extension™ (ACE) Enables Andes Processors to Provide Acceleration for Specific Applications

Post author:aaronzhang
Post published:2014-07-17
Post category:Press Release

【Taiwan HsinChu】 Andes Technology, the first dedicated vendor of innovative 32-bit CPU IPs and associated SoC platforms in Asia, announces its brand new SoC development solution, the Andes Custom Extension™ (ACE) framework, and the first supporting AndesCore™ processor, the EN801. With the easy-to-use ACE language, customers can create instructions specific to their applications and optimize the performance and power consumption in a much shorter timeframe. The programmability allows more performance efficiency on a chip and provides protection for proprietary software IPs through custom instructions. The ACE framework can be used from DSP acceleration and high-volume data processing to emerging applications whose features and specifications are still evolving such as IoT, wearable devices, smart sensor devices, medical devices, storages, packet processing, intelligent household appliances, touch panels, wireless charging, fingerprint identification, SSD and encryption security chips.

Supported by the ACE framework, the EN801 is the first extensible AndesCore™. Designers can create application-specific instructions to meet the most stringent product requirements with high performance efficiency. The resulting programmable acceleration allows a single chip to offer more functionalities than those relying on hardwired engines. Here are a couple examples,

A MADD operation with two 16×16 bit multiplication added to 32 bits has 8 times speedup.
A FIR filter with 64 bits of precision achieves 17 times speedup.
A 32-bit CRC32 operation delivers over 90 times speedup.

Under the ACE framework are the ACE language and COPILOT tool (Custom-OPtimized Instruction deveLOpment Tools™) to simplify the instruction design process. Based on ACE descriptions, COPILOT generates the corresponding extended RTL, verification environment and relevant extension modules to be used with Andes standard development tools, simulator and AndesCore RTL. For SoC developers who need programmability and efficiency, ACE directly addresses their needs. As ACE gives the extensibility for developers to add application-specific instructions, it also offers post-silicon programmability to modify or extend functionalities. This facilitates the re-engineering of products without the trouble of starting a new SoC design process for different product positioning – which is a compelling advantage over SoCs with excessive hardwired functions.

Dr. Charlie Su, Chief Technical Officer and Senior VP of R&D at Andes, states, “The launch of the ACE framework responds to our customers’ increasing demands for extensible processors after they encounter all sorts of problems during SoC development. They are not satisfied with traditional extensible processors using complicated tools restricted to high-end applications and the early-stage baseline CPU cores in these processors. Some existing extensible processors don’t even come with any baseline CPU core, forcing customers to develop one themselves. Foreseeing the trend of new generation extensible processors with the rise of intelligent devices, Andes introduces the EN801 which is supported by the ACE framework and inherits high efficiency, low power consumption and compact code size from the highly-optimized AndesCore N801. The extensible processor EN801 allows SoC developers to incorporate functionalities and increase flexibility for SoC optimization. Through the ACE language and COPILOT, SoC developers can define their own instructions with ease and simplify the design process of extending RTL and simulator, thereby facilitating the instruction creation while avoiding tedious and error-prone design work. In an era of ever-changing applications and product requirements, Andes is ready to take on more performance and power consumption challenges with the ACE framework.”

Andes Technology and M31 Technology Cooperate in Building UP Optimized CPU Solution

Post author:aaronzhang
Post published:2014-06-30
Post category:Press Release

【Hsinchu, Taiwan】June 30, 2014 – Andes Technology Corporation (www.andestech.com), the first and leading supplier of licensable processor cores in Asia, and M31 Technology, the boutique Intellectual Property provider, today announced together that AndesCore™ N1337 has adopted M31’s advanced technology MACH™ to reach 1GHz frequency under 40nm process. N1337 as a high speed CPU solution can be applied to handheld devices, intellignet TV, tele-communication, and consumer entertainment applications.

Embedded with Andes’ 32-bit microprocessor core AndesCore™ N1337, SoC can obtain innovative advantages of low power, small area, high performance, and be benefited from its easy-to-use flexible development platform. The major target applications are controller SoC for DTV, Digital Home, Setop Box, Switcher, Router, Fiber Network, Surveillance, SSD, ADAS, etc.

Andes’ CTO and R&D VP Dr. Charlie Su stated “AndesCore™ N1337 implemented by Andes’ newest V3 instruction set and equipped with saturation instructions, is an 8 pipeline stage, 32-bit processor which can reach as high as 1.87DMIPS/MHz. N1337 supports 64-bit AXI in addition to popular AHB bus. Its innovative architecture ensures to meet the most demanding SoC efficiency requirement. In addition, N1337 supports common interface allowing instruction fetch, data access and DMA to simultaneously access Unified Local Memory (ULM), which tremendously increases data transmission speed and is very suitable for large amount of data handling in a RTOS system. For Linux support, N1337 implements Memory Management Unit (MMU) and L2 Cache. With Andes’ L2 Cache controller, N1337 can be applied to high end applications.”

MACH™ family of M31 Technology includes three essential components to speed up CPU frequency. Its ultra-high-speed (UHS) memory complier is designed to meet the critical performance requirement of CPU L1 cache. MACH™ cell library is to boost the performance of CPU logic. And, MACH™ optimization flow with unique numerical algorithms can dynamically adjust the transistor sizes and create new cells to reach optimal performance.

Mr. H.P. Lin, M31 Technology’s Chairman, stated “M31 is very glad to become a partner of Andes Technology. M31’s MACH™ family can analyze customer’s cell library to give dynamic adjustment and create new cells. MACH™ family provides customers various solutions for high speed interface applications including CPU and GPU market.”

Mr. Frankwell Jyh-Ming Lin, Andes Technology’s President, stated “CPU performance is the most challenging goal of portable devices including cell phones and tablets. Adopting M31’s MACH™ family can speed up 10%~15% performance. Andes Technology is very glad to cooperate with M31 and appreciates the co-development opportunity. M31 has become another powerful technology partner for Andes. Andes’ 32-bit processor cores and development tools have been widely adopted in this industry with positive reputation. Andes will continuously develop products in diversified segments for different applications, and hopes to bring Andes’ customers the best technology, service and solutions.”

For more information about Andes technology and its low power, high performance 32-bit CPU IP series, please refer to www.andestech.com or contact sales@andestech.com.

Andes Technology Corporation. All Rights Reserved.