IAR Systems and Andes collaborate to boost performance for RISC-V users

Establish partnership to provide powerful solutions based on Andes’ RISC-V technologies

Uppsala, Sweden and Hsinchu, Taiwan—November 29, 2018—
IAR Systems®, the future-proof supplier of software tools and services for embedded development, and Andes, the prominent CPU IP provider, announce that they have formed a partnership in order to deliver powerful development tools for Andes’ RISC-V-based solutions.

IAR Systems provides the C/C++ compiler and debugger toolchain IAR Embedded Workbench®. The toolchain offers leading code performance for size and speed, as well as extensive debug functionality with a fully integrated debugger with simulator and hardware debugging support. Since 1983, IAR Systems’ solutions have ensured quality, reliability and efficiency in the development of over one million embedded applications. The strong technology offering is accompanied by IAR Systems’ renowned technical support and services.

Andes Technology Corporation is a leading embedded processor intellectual property supplier. Since 2005, the company develops high-performance, low-power processors and their associated SoC platforms, and they have created a rich series of 32-bit embedded CPU core families with a record of more than 2.5 billion accumulated units of Andes-Embedded SoC shipped globally by end of 2017. Andes provides the RISC-V cores, AndesCore™ N25(F)/NX25(F) and A25/AX25, with AndeStar™ V5 instruction extension and leading Andes Custom Extension™ (ACE) instruction customization capabilities. The AndesCore families are being used for a wide range of smart emerging applications including satellite navigation, high-precision sensor fusion, advanced smart meters, smart wireless communication, networking, voice processing, ADAS, storage, and machine/deep learning. To further boost the performance in the target applications, and to ensure code density, Andes and IAR Systems collaborate to support the cores in IAR Embedded Workbench.

“Andes is moving heavily into RISC-V, and we are determined to support their efforts,” says Anders Holmberg, Chief Strategy Officer, IAR Systems. “By providing maximized code speed and minimized code size for Andes powerful RISC-V cores, we will create new possibilities to reduce time to market and ensure high quality applications based on Andes’ RISC-V ISA.”

“We are excited to partner with IAR Systems to bring new capabilities to the RISC-V community,” comments Dr. Charlie Su, CTO and Senior VP, Andes Technology Corporation. “Together, we will offer powerful solutions for Andes V5 extended ISA as well as ACE that will enable our customers to meet the demanding requirements of today’s electronic devices.”

Support for Andes cores will be provided in IAR Embedded Workbench for RISC-V. The toolchain is currently under development and the first version will be available in mid-2019. 

About IAR Systems

IAR Systems supplies future-proof software tools and services for embedded development, enabling companies worldwide to create the products of today and the innovations of tomorrow. Since 1983, IAR Systems’ solutions have ensured quality, reliability and efficiency in the development of over one million embedded applications. The company is headquartered in Uppsala, Sweden and has sales and support offices all over the world. Since 2018, Secure Thingz, a provider of advanced security solutions for embedded systems in the IoT, is part of IAR Systems. IAR Systems Group AB is listed on NASDAQ OMX Stockholm, Mid Cap. Learn more at www.iar.com.

About Andes

Andes Technology, the first CPU IP supplier in Asia, has been developing innovative high-performance/low-power 32/64-bit processors and associated SoC platforms since its establishment in 2005. Its powerful CPU lineup has achieved design wins in numerous embedded applications across the world, making a cumulative record of over 2.5 billion SoC shipments containing Andes IP up to 2017. Andes is a founding member of the RISC-V Foundation and also the first mainstream CPU vendor adopting the RISC-V open ISA. For more information please visit: www.andestech.com.

Continue ReadingIAR Systems and Andes collaborate to boost performance for RISC-V users

Andes Announces over 1.2 GHz RISC-V Cores Series at 28nm: A25/AX25 and N25F/NX25F

Andes Technology Corporation (TWSE:6533), a founding member of the RISC-V Foundation and the leading Taiwan-based supplier of 32/64-bit embedded CPU cores with solutions serving in excess of 2.5-Billion SoCs covering a wide range of applications, today announced the availability of the latest four members of the AndeStar™ V5 high efficiency processor series: (1) the AndesCore™ A25/AX25, perfect for Linux-based applications such as UAV(Unmanned Aerial Vehicle), smart wireless communication, networking, video processing, ADAS (Advanced Driver Assistance Systems), storage, data center, and machine/deep learning; and (2) the AndesCore™ N25F/NX25F, that can be used for a wide range of floating-point intensive applications including advanced motor control, satellite navigation, high-precision sensor fusion, and advanced smart meters.

The A25/N25F are 32-bit CPU IP cores, and AX25/NX25F are 64-bit ones. All of them are capable of operating over 1.2 GHz at the worst-case corner of TSMC 28nm HPC+ process, delivering over 3.5 CoreMark/MHz, and 1.3 MWIPS/MHz for single precision floating point. Their common features include dynamic branch prediction, instruction and data caches, Local Memories for low-latency accesses, L1 memory ECC for soft error protection, and Andes Custom Extension™ (ACE) to greatly simplify instructions design for Domain-Specific Acceleration (DSA). All cores support User/Machine Mode (U/M mode) while the A25/AX25 add Supervisor Mode (S-mode) and memory management unit (MMU) to run Linux kernel and its applications. In the floating point side, the N25F/NX25F support IEEE754-compliance with either single precision or single/double precisions. Andes further extends floating-point support to half precision for applications such as machine learning, where loads/stores automatically convert 16-bit half-precision data to/from single precision data. The A25/AX25 also optionally support all the floating-point features mentioned above. All processors are offered in human-readable and tool-friendly Verilog RTL and with a GUI tool for designers to flexibly choose their final configurations.

“Andes adopted RISC-V as the subset of its fifth generation architecture, the AndeStar™ V5, and brings it to the RISC-V community,” Dr. Charlie Su, CTO and Senior VP of Andes Technology commented, “The A25/AX25 and the N25F/NX25F are versatile processors with a 5-stage pipeline and RISC-V compliant ISA (RV-IMAC[FD]). All 25-series processors include Andes-enhanced Platform-Level Interrupt Controller (PLIC) with vectored interrupt dispatch and priority-based preemption for efficiently serving various types of system events, and can be pre-integrated with 64-bit AXI or 64/32-bit AHB bus platforms. They also bring to RISC-V common cache features for embedded systems such as finer-grained cache management, write-back and write-through modes, and uncached accesses. In addition, PowerBrake, QuickNap™ and WFI (Wait for Interrupt) operation together enable various power modes to address application needs; JTAG and 2-wire interfaces are available for debug and trace support; the StackSafe™ protects the software stack from overflow and underflow; and the Andes’ patented CoDense™ enhances code density on top of RISC-V C-extensions. It also supports misaligned memory accesses directly in hardware, which is good for porting existing software from ARM and x86; without it, more than 100 cycles may be required in the exception handler. They have been selected by our customers for their exceptional performance/power, flexible configurations, highly optimized compiler and comprehensive development tools. We are also engaged with 3rd party partners to provide more development tools, IPs, and runtimes, including fast system simulators, security subsystems, SoC analytics, tracer and debugger, software stacks and more. “

The V5 AndesCores inherit the compact, modular and extensible advantages from the RISC-V technology and also enjoy its fast-growing ecosystem. In addition to full compatibility to RISC-V technology by supporting its standard instructions, AndeStar V5 architecture brings Andes-extended features already proven in high-volume V3 AndesCores to be effective and beneficial to embedded applications.

Andes is a major contributor to the RISC-V open source software, ranging from GCC and LLVM compilers, libraries, debuggers, to U-Boot and the Linux kernel and its key components. In addition, Andes also plays a key role to grow the RISC-V architecture, acting as the chair of ISA P-extension (Packed DSP) Task Group and the co-chair of Fast Interrupt Task Group. Andes is committed to taking RISC-V mainstream by helping accelerate the ecosystem growth together with partners.

 

Continue ReadingAndes Announces over 1.2 GHz RISC-V Cores Series at 28nm: A25/AX25 and N25F/NX25F

GOWIN Semiconductor Licenses Andes Technology RISC-V CPU Core For Its Arora® GW-2A FPGA Family Products

Andes Technology Provides GOWIN Standard RISC-V CPU ISA, 
Plus Enhanced Features for Performance, Reliability, Program Code Size and Power Consumption

HSINCHU, TAIWAN & GUANGZHOU, CHINA – October 01, 2018—Andes Technology Corporation, the leading Asia-based supplier of small gate count, low-power and high performance 32/64-bit embedded CPU cores, announces that GOWIN Semiconductor has licensed Andes Technology’s RISC-V CPU core for its Arora® GW-2A FPGA family of products. Besides the standard RISC-V ISA, the Andes Technology RISC-V CPU comes with additional features to improve performance, reliability, program code size and power consumption reduction.

“Adding the Andes RISC-V to our Arora Family of FPGA’s provides fast time to market for engineers wanting to implement a design using the RISC-V CPU,” said Scott Casper, Director of Sales for GOWIN’s Americas Region. “The CPU core can be implemented in a relatively small number of FPGA logic elements thus providing additional capacity for the engineer’s logic design.  Having Andes as a partner has enabled GOWIN to quickly supply customer demand for this popular CPU ISA.”

“We are thrilled that GOWIN has chosen the Andes RISC-V CPU core for their Arora® GW-2A FPGA Family products,” said Vivien Lin, Vice President of Sales Andes Technology USA Corp. “Demand for the Andes RISC-V CPU offering is growing and having GOWIN offering an FPGA version combined with the Andes RISC-V  Eclipse-based development environment provides designers a fast track to develop their offering.”

About GOWIN Semiconductor Corp.
Founded in 2014, GOWIN Semiconductor Corp., headquartered with major R&D in China, has the vision to accelerate customer innovation world-wide with their programmable solutions. GOWIN focuses on optimizing their products and removing barriers for customers using programmable logic devices. GOWIN’s commitment to technology and quality enables customers to reduce the total cost of ownership from using FPGA on their production boards. GOWIN’s offerings include a broad portfolio of programmable logic devices, design software, intellectual property (IP) cores, reference designs, and development kits. GOWIN strive to serve customers in the consumer, industrial, communication, medical, and automotive markets worldwide. For more information about GOWIN, please visit www.gowinsemi.com.

About Andes Technology Corporation
Andes Technology Corporation was founded in Hsinchu Science Park, Taiwan in 2005 to develop innovative high-performance/low-power 32/64-bit processor cores and associated development environment to serve worldwide rapidly growing embedded system applications. The company delivers the best super low power CPU cores, including the rising star RISC-V series with integrated development environment and associated software and hardware solutions for efficient SoC design. Up to the end of 2017, the cumulative amount of SoCs containing Andes’ CPU IP reaches 2.5 billion. To meet the demanding requirements of today’s electronic devices, Andes Technology delivers configurable software/hardware IP and scalable platforms to respond to customers’ needs for quality products and faster time-to-market. Andes Technology’s comprehensive CPU line includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications. From 2017, Andes expanded its product line and provides a total solution of RISC-V, the RISC-V series as V5 families processors cores include 32/64-bit N25/NX25 for general purpose, N25F/NX25F for floating-point intensive applications and A25/AX25 for Linux-based applications. For more information about Andes Technology, please visit http://www.andestech.com/.
 

Continue ReadingGOWIN Semiconductor Licenses Andes Technology RISC-V CPU Core For Its Arora® GW-2A FPGA Family Products

Andes Technology Corporation and XtremeEDA Corporation Cooperate to Develop Joint Design Wins on Emerging RISC-V Designs

Andes to Offer Its Low-Power, High Performance CPU Cores, Including New RISC-V IP;
XtremeEDA to Provide Its Front-end IC Design Expertise to Reduce Designers’ Time to Market
 

Andes Technology Corporation, the leading CPU IP supplier of small, low-power, high performance 32/64-bit embedded CPU cores, and XtremeEDA Corporation, a leading North American provider of front-end design and verification services for the semiconductor industry, today announced they will cooperate to develop joint design wins to benefit both companies. Andes will provide Its low-power, high performance CPU cores, including the first RISC-V core from a public semiconductor company; XtremeEDA will provide experienced front-end design and verification services, thus collectively reducing designers’ time to market.

“We are excited to be joining forces with XtremeEDA to provide our customers CPU IP and design resources they may not possess internally,” said Emerson Hsiao, Senior Vice President of Sales and Technical Service at Andes Technology Corporation USA. “In today’s embedded systems-on-chip (SoC) market, an increasingly important variable in how chips are designed and produced is time to market. A new start-up may have a great architectural specification but may lack the team, design tools, and IP needed to convert the design idea into a chip. In addition, many cannot afford the high cost for design verification.  Together XtremeEDA and Andes can offer its customers access to a design and verification team and a library of IP to support the Andes core that will provide reduced time to market for their unique design.”

“Andes represents a great supplement to our own sales and marketing effort,” said Chris Raeuber, XtremeEDA’s Director of Engineering, US. “As a major CPU core supplier in Asia, Andes has great market insight into the new designs going on in that region and they are bringing that knowledge to the U.S. They are identifying start-ups with unique new SoCs targeting emerging markets that need front-end and verification engineering resources, such as what we offer.  Together, we provide our mutual customers a means of rapidly getting their designs into silicon.”

Complementary Strengths
One service Andes provides its customers is an FPGA based version of its processor IP on a reference platform including the new RISC-V IP core. Prospects can evaluate the Andes core using the reference board. In many instances, once a prospect becomes a customer, he may decide to use a design services supplier to take the FPGA implementation and convert it into an SoC chip design. Having XtremeEDA, who is familiar with the Andes reference platform, to convert the FPGA implementation to an SoC chip design greatly shortens the customer’s time to market.

About XtremeEDA Corp.
Founded in 2002, XtremeEDA is a North American based provider of front-end design and verification services for the semiconductor industry.  Our team is unparalleled – with employees averaging 20+ years of semiconductor industry experience and expertise that spans most major sectors. Our business approach emphasizes enduring and transformational relationships to employ creative solutions that enable extraordinary results for all stakeholders. For more information, please visit https://www.xtreme-eda.com

Continue ReadingAndes Technology Corporation and XtremeEDA Corporation Cooperate to Develop Joint Design Wins on Emerging RISC-V Designs

HunterSun Corporation Licenses AndesCore™ N1068A-S for Its HS6601 Single-Chip Bluetooth SoC Targeting Wireless Audio Applications

Andes’ N1068A-S Provides Design Flexibility and Balances Performance and Power Consumption for Wireless Audio Applications
 

HSINCHU, TAIWAN – June 20th , 2018 – Andes Technology Corporation, the leading Asia-based supplier of small, low-power, high performance 32/64-bit embedded CPU cores, today announced that HunterSun Corporation has licensed its mid-range AndesCore™ N1068A-S for the HunterSun HS6601 single-chip Bluetooth SoC that receives wireless audio, drives speakers and digitizes microphone input.  Andes’ N1068A-S provides design flexibility and required computing power for processing Bluetooth protocol with Enhanced Data Rate (EDR) functionality and combining audio processing and applications.

“Andes Technology’s N1068A-S provided our engineering team, a highly integrated, lower cost solution for our HS6601 single-chip Bluetooth,” said Xiaobin Ye, Senior Vice President of HunterSun Corp. “The demand for Bluetooth SoCs in audio applications is extremely strong in China. With the Andes CPU, we were able to integrate Bluetooth stack and required profiles with our audio framework expertise while providing FM radio and I/O functionality for USB and SD memory demanded in most of the audio applications.  Incorporating all this functionality on chip enabled us to gain an advantage in this highly competitive product segment.”

“We are extremely pleased that HunterSun chose our N10 CPU IP for their HS6601 Bluetooth Chip,” said Charlie Hong-Men Su, Andes CTO and Senior Sales Vice President. “The AndesCore™ N10 processor is ideal for HunterSun’s Bluetooth audio application with a balance of performance and power consumption. The N10’s 5-stage pipeline and the rich AndeStar™ Instruction-Set Architecture provides plenty of performance headroom to accommodate the evolution of the Bluetooth dual mode specification and to support a wide range of audio applications by the HunterSun SoC.  The N1068A-S also comes with instruction and data cache and local memory options. These enable the system to provide both power and design efficiency to perform a combination of wireless communication and multimedia processing.”

About HunterSun Corporation
HunterSun Corporation is a high-tech enterprise located in Zhongguancun Science and Technology Park, co-founded by domestic and international experts in integrated circuits and electronics. The company is focused on the development of RF integrated circuit chips, analog integrated circuit chips, and System-on-Chip. The product portfolio currently includes wireless communications chips, power management chips, RF front-end modules, etc. HunterSun is also committed to develop core technology and solutions of the “Internet of things”. The products are applied in the fields of smart phone, feature phone, tablet personal computer, wireless mouse, keyboard and smarthome, etc.

HunterSun headquarter is located in Beijing. Beijing HunterSun Company is mainly responsible for the operations. HunterSun has its research and development centers in Beijing and Shanghai. Additionally, HunterSun has established its marketing and sales and technology support offices in Hong Kong, Shanghai and Shenzhen. HunterSun currently has 150 employees, and for RD group, 80% of its employees have a master degree or above; 10% of them are holders of PhD

Continue ReadingHunterSun Corporation Licenses AndesCore™ N1068A-S for Its HS6601 Single-Chip Bluetooth SoC Targeting Wireless Audio Applications

SiFive Inc. and Andes Technology Corporation Join Forces to Promote RISC-V

Two Leading RISC-V Suppliers Agree to Cooperate to Further Promote RISC-V Adoption while Continuing to Aggressively Expand the RISC-V Ecosystem
 
Shanghai and San Mateo, Calif.—July 13, 2018— Andes Technology Corporation, the prominent CPU IP provider, and SiFive Inc., the leading provider of ASIC design service and RISC-V CPU Core IP, have announced they are joining forces to jointly promote RISC-V. The two companies will each contribute their unique expertise in CPU development and support to expand the ecosystem for the RISC-V instruction set architecture (ISA) to enable a new era of processor innovation through open standard collaboration. 


“RISC-V is providing a newfound freedom in silicon design, fostering stronger collaboration across the semiconductor industry. We’re excited to see SiFive and Andes partnering to expand the RISC-V ecosystem, making it easier for other industry players to quickly bring to market innovative designs based on the open RISC-V ISA,” said Rick O’Connor, Executive Director of the non-profit RISC-V Foundation.
 
As a founding member of the RISC-V Foundation, Andes Technology is dedicated to bringing its expertise in low-power and high performance 32/64 bit processor cores to the development of the RISC-V ISA. For example, at the recent RISC-V Workshop in Barcelona, Andes proposed an extension to the RISC-V ISA based on the DSP ISA used in Andes’ successful D10 and D15 processors. In addition, Andes debuted four new RISC-V processor IPs with compliant floating-point and Linux support: the 64-bit NX25F and AX25, and 32-bit N25F and A25. Andes’ innovative ACE (Andes Custom Extension™) solution allows Andes’ customers to construct unique system architecture and hardware/software partitioning by defining domain-specific acceleration instructions to provide the best optimization for their SoC designs. Offering technologies in processor, system architecture, operating system, software toolchains development, and SoC design platforms IP, Andes enables its customers to shorten time-to-market while developing high-quality silicon in the shortest design time.
 
SiFive’s cloud-based SaaS approach allows its customers to produce ASIC and IP solutions that meets their needs quickly and affordably. SiFive’s mission is to democratize access to custom silicon through its IPs and platforms. Since becoming available, the HiFive1 and HiFive Unleashed software development boards have been deployed in more than 50 countries. Additionally, the company has engaged with multiple customers across its IP and SoC products shipped the industry’s first RISC-V SoC in 2016 and the industry’s first RISC-V Core IP with support for Linux in October 2017.
 
Led by a team of industry veterans and founded by the inventors of RISC-V, SiFive has recently raised $50.6M in Series C funding to fund innovation and provide leadership in bringing highly disruptive RISC-V technologies to the marketplace.
 
RISC–V Enables Innovation
RISC-V is an open ISA enabling a new era of processor innovation through open standard collaboration. Born in academia and research, the RISC-V ISA delivers a new level of extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation. As the focus of a new upsurge in technology, RISC-V has flourished around the world. RISC-V is the new open ISA, which is compact, modular and extensible. It enables the rapid development of a design ecosystem. A large and growing number of leading technology companies have joined the RISC-V Foundation. SiFive and Andes have chosen Shanghai as the ideal location to relay efforts in promoting RISC-V to the world.
 
RISC-V is an open, extensible ISA, and its applications include the emerging areas such as AI, IoT, and ADAS. Its expansive ecosystem is even more valuable. The RISC-V ISA is expected to have a bright future of computing design in China.
 
About SiFive
SiFive is the leading provider of market-ready processor core IP based on the RISC-V instruction set architecture. Founded by the inventors of RISC-V, SiFive helps SoC designers reduce time-to-market and realize cost savings with customized, open-architecture processor cores, and democratizes access to optimized silicon by enabling system designers to build customized RISC-V based semiconductors. SiFive is located in Silicon Valley and has venture backing from Sutter Hill Ventures, Spark Capital, Osage University Partners and Chengwei Capital, along with strategic partners Western Digital, Intel, SK Telecom, and Huami. For more information, visit www.sifive.com.
 
About Andes
Andes Technology Corporation was founded in Hsinchu Science Park, Taiwan in 2005 to develop innovative high-performance/low-power 32/64-bit processor cores and associated development environment to serve worldwide rapidly growing embedded system applications. 
The company delivers the best super low power CPU cores, including the rising star RISC-V series with integrated development environment and associated software and hardware solutions for efficient SoC design. Up to the end of 2017, the cumulative amount of SoCs containing Andes’ CPU IP reaches 2.5 billion.
To meet the demanding requirements of today’s electronic devices, Andes Technology delivers configurable software/hardware IP and scalable platforms to respond to customers’ needs for quality products and faster time-to-market. Andes Technology’s comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications. From 2017, Andes expands its product line and provides a total solution of RISC-V, the RISC-V series as V5 families processors cores include N25/NX25 and upcoming N25F/NX25F and A25/AX25.  
For more information about Andes Technology, please visit http://www.andestech.com/.
 
PRESS RELEASE
 
Media Contacts:
Leslie Clavin 
SHIFT Communications for SiFive
(415) 591-8440
sifive@shiftcomm.com
 
Media Contact:
Jonah McLeod
Andes Technology Corporation
(510) 449-8634
jonahm@andestech.com
 

Continue ReadingSiFive Inc. and Andes Technology Corporation Join Forces to Promote RISC-V

Andes Technology Corporation Records a Cumulative 2.5 Billion SoC Shipments Containing Its CPU IP Since Inception

In 2017 Alone, 
The Company Reported 590 million SoC Shipments Containing Its CPU IP


Hsinchu, Taiwan – June 20, 2018 – Andes Technology Corporation (TPE: 6533), the leading Asia-based supplier of small, low-power, high performance 32/64-bit embedded CPU cores, today announced that at the end of 2017, the company has recorded a cumulative total of 2.5 billion SoCs containing its CPU IP. In 2017, the company reported 590 million SoCs shipped worldwide containing its CPU IP. The 2017 shipments alone represented nearly 2.4 percent of the cumulative total SoCs shipped. 

Andes President, Frankwell Jyh-Ming Lin declared “Andes technology and its CPU IP play an important role in providing convenience and improving the connectivity in the modern world. After several years of steadily increasing unit shipment growth, our customers are now in large volume production. More importantly, they continue to license our IP for next generation versions of their designs. As a result Andes is seeing steadily increasing growth in royalty income and expect this trend to continue going forward. In the foreseable future, the number of SoCs with Andes CPU IP will continue growing in customers’ products including gaming, Wi-Fi, Bluetooth, touch screen controller, surveillance, sensor hub, MCU, SSD controller, USB3.0 storage, and more.”

Andes is also making inroads into the next generation of high volume designs now coming onto the market. These include AI applications, automotive IoT and Innovative ADAS (Advanced Driver Assistance Systems). The company is targeting other markets including robotics, augmented/virtual reality (AR/VR), and voice recognition. 

Since 2005, Andes Technology has steadily developed highly efficient, low-power 32/64-bit embedded processors and associated SoC development platforms to shorten its customers’ time to market. In addition, the company continues to innovate next generation CPU architectures using its fully compliant RISC-V ISA. With its new AndeStar™ V5 architecture, Andes provides a complete solution for 64-bit embedded SoC designs by bringing RISC-V compliance together with Andes’ successful line of AndeStar™ V3 IP cores, convenient features and architecture extensions, standard Andes IDE software toolchain with comprehensive extended features, SoC peripherals, hardware developing platforms, service and support.

About Andes
Andes Technology Corporation was founded in Hsinchu Science Park, Taiwan in 2005 to develop innovative high-performance/low-power 32/64-bit processor cores and associated development environment to serve worldwide rapidly growing embedded system applications. The company delivers the best super low power CPU cores with integrated development environment and associated software and hardware solutions for efficient SoC design.  

To meet the demanding requirements of today’s electronic devices, Andes Technology delivers configurable software/hardware IP and scalable platforms to respond to customers’ needs for quality products and faster time-to-market. Andes Technology’s comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications.

Continue ReadingAndes Technology Corporation Records a Cumulative 2.5 Billion SoC Shipments Containing Its CPU IP Since Inception

Solid State System Co., Ltd. selects Andes AndesCore™ N9 for Its SSS6131 USB 3.1 Gen 1 Flash Controller Highly Demand for Storage Application

N9 Executes Flash Control in the SSS6131 USB 3.1 Gen 1 Flash Controller

Including Read, Write, Erase, ECC, and Load Leveling Functions

HSINCHU, TAIWAN – Andes Technology Corporation, the leading Asia-based supplier of small, low-power, high performance 32/64-bit embedded CPU cores, today announced that Solid State System Co., Ltd. (3S) has licensed the mid-range AndesCore™ N903A for the SSS6131 USB 3.1 Gen 1 flash controller chip. The chip is being designed into USB flash drives now. USB 3.1 Gen 1 is capable of data transfer speeding up to 5Gbps. The 5-stage pipeline N9 is ideal for providing USB 3.1 Gen 1 flash control functions such as read, write, erase, and static and dynamic wear-leveling functions unique to managing flash.

“Andes N9 provided the flexibility and performance required for our industry leading SSS6131 USB 3.1 Gen 1 controller,” said Cheng Liou R&D Vice President Solid State System Co., Ltd. “It allows our design to exploit the performance enhancements of the USB 3.1 Gen1 standard including an interface bandwidth increase up to 5Gbps. USB 3.1 Gen1 flash drives have seen considerably increased demand, especially in Asia. Our SSS6131 USB 3.1 Gen 1 controller has benefitted from this demand.”

“3S is a longtime Andes customer and we value their business.” said Andes Technology Corp. CTO and Senior Vice President Charlie Hong-Men Su. “We are extremely pleased that Andes N9 CPU core, which is more power efficient (DMIPS/mW) than our major competitor, contributes to the success of 3S SSS6131 USB 3.1 Gen 1 flash controller chip in the market place.”

In the Transparency Market Research report “USB 3.0 Flash Drives Market (Manufacturing Process – Conventional and Chip-on-Board; Capacity – Below 4 GB, 4 GB to 16 GB, 16 GB to 64 GB, 128 GB, and 256 GB and Above) – Global (The U.S., Europe, and Asia Pacific) Industry Analysis, Size, Share, Growth, Trends and Forecast 2016 – 2020,” the flash drive market is expected to grow 23.5 percent from 2016 to 2020, reaching over $3B by 2020. “Asia Pacific had been the leading region in the global USB 3.0 flash drives market in terms of production volume as well as demand volume,” the report declared. (USB 3.0, the third major revision to the Universal Serial Bus (USB) standard, has been renamed USB 3.1 Gen 1 by the USB Implementers Forum).

About Solid State System Co., Ltd. (3S)
Founded in 1998, 3S is well known for its NAND flash knowledge and experiences in storage. 3S has pioneered NAND-based controller solutions and is expanding its product portfolios.  Headquartered in Hsinchu, Taiwan, with branch offices located in Taipei and Shenzhen, China; 3S was listed for Taipei Exchange trading in Year 2007 (Stock symbol: 3259). 3S has an international reputation for providing high performance IC solutions with high reliability and on-time delivery. In 2010, 3S successfully developed and launched its CMOS MEMS microphone. With a critical patent portfolio, 3S is the first Taiwan IC design house to offer advanced microphone solutions easily integrated into customer designs.

For more information, visit http://www.3system.com.tw

About Andes
Andes Technology Corporation was founded in Hsinchu Science Park, Taiwan in 2005 to develop innovative high-performance/low-power 32/64-bit processor cores and associated development environment to serve worldwide rapidly growing embedded system applications. The company delivers the best super low power CPU cores with integrated development environment and associated software and hardware solutions for efficient SoC design.  
 
To meet demanding requirements of today’s electronic devices, Andes Technology delivers configurable software/hardware IP and scalable platforms to respond to customers’ needs for quality products and faster time-to-market. Andes Technology’s comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications.
 

For more information about Andes Technology, please visit http://www.andestech.com/
 

Continue ReadingSolid State System Co., Ltd. selects Andes AndesCore™ N9 for Its SSS6131 USB 3.1 Gen 1 Flash Controller Highly Demand for Storage Application

Andes Processors Are Not Susceptible to Meltdown and Spectre Attacks

HSINCHU, TAIWAN – January 24, 2018 – Recent reports on two security vulnerabilities for processors spanning multiple instruction set architectures have brought the security of processor hardware to high attention worldwide. With years of experience on developing embedded processors for the industry and world markets, Andes Technology Corporation is determined to ensure the security of embedded systems built on Andes processors. Andes announced today, after its thorough review, none of its processors are affected by either Meltdown or Spectre flaws.

“Security is a major concern in SoC designs of Andes customers and we have been watching closely the recent Meltdown and Spectre vulnerabilities, which exploit speculative execution to steal sensitive data, ” said Dr. Charlie Su, CTO and Senior VP of R&D of Andes Technology Corp. “After detailed analysis, we conclude that all AndesCore™ processors are immune to both attacks due to the way our processor pipelines are designed. No subsequent accesses will be possible when privilege violations are encountered in our designs and our branch speculation does not allow subsequent instructions to go too far to allow side-channel information leak. Additionally, our secure AndesCore S8 processor not only offers strong protection against unauthorized accesses such as Meltdown and Spectre, but also strives to not leak information under physical attacks such as high energy radiation attacks.”

“While the whole world is watching the further development of the incident, Andes takes initiative to review and announce the review result to ensure that our customers are not vulnerable. Since none of the Andes processors are affected, no mitigations are needed for Andes embedded SoCs,” stated Andes President, Frankwell Jyh-Ming Lin. “However, for the benefit of strengthening the security of AndesCore processors, Andes continues to track the latest analysis and updates on processor security issues as references for our future processor designs.”

Andes provides N, D, E, S and NX families of AndesCore processors. While it is the primary goal of the S family processors to serve as heavy-armored security processors, Andes recognizes that processors of the rest of AndesCore families may also need to process confidential information in open environments with security concerns. As the level of attention to the security of processor hardware is ever-increasing, Andes is committed to invest heavily on robustness of security features of all its processor products. 

For more information, e-mail info@andestech.com

Continue ReadingAndes Processors Are Not Susceptible to Meltdown and Spectre Attacks

Andes Announces Advanced SoC Development Environment for V5 AndesCore™ N25 and NX25 Processors with Tool Partners

Andes Announces Advanced SoC Development Environments for V5 AndesCore™ N25 and NX25 Processors with Tool Partners

HSINCHU, TAIWAN – November 20, 2017 – Andes Technology Corporation (TWSE: 6533), the leading Asia-based supplier of compact, low-power, high-performance 32/64-bit embedded CPU cores and a founding member of RISC-V Foundation, today announces the partnership with the world-class tools vendors including Imperas, Lauterbach, Mentor, a Siemens Business, and UltraSoC (in alphabetical order) to bring their system-on-chip (SoC) development environments to Andes V5 processors and the RISC-V community.

Andes is a 12-year-old CPU IP vendor with solutions serving in excess of 2-Billion SoCs covering a wide range of applications. As a natural evolution, Andes has adopted RISC-V as the subset of its fifth generation architecture, the AndeStar™ V5, and brings it to the RISC-V community. Based on the V5 architecture, Andes announced two high-performance 1+ GHz AndesCore™ processor IP’s, the 32-bit N25 and the 64-bit NX25, both delivering over 2.8 DMIPS/MHz and over 3.4 CoreMark/MHz, and gate count as small as 30K and 50K, respectively, when using TSMC 28nm HPC process. The N25 and NX25 are ideal for high-speed control tasks in networking, storage, and AI applications.

“To support the ever-increasing features of the emerging applications, SoC engineers face the challenges of the design complexity and time-to-market. They need powerful development tools such as fast system simulation for architectural exploration and SW development, emulation for functional verification and system validation, performance optimization, tough bugs tracing and embedded analytics. That is why Andes has worked with some of the partners on V3 AndesCore™ processors for many years,” Frankwell Jyh-Ming Lin, President of Andes Technology, commented, “We are now collaborating with Imperas, Lauterbach, Mentor, and UltraSoC to provide those advanced development tools for our new V5 AndesCore™ N25 and NX25, and the RISC-V community. We are excited to enrich the ecosystem of RISC-V with our partners’ great support, and look forward to the creative products from our common customers in the near future.”

“Imperas supports Andes with Open Virtual Platforms (OVP) Fast Processor Models of the AndeStar™ V5 processors and with virtual platform- based tools to help with the development, porting, debug and test of software and operating systems running on the V5 processors. Building on our partnership with Andes, Imperas is pleased to deliver our next-generation models, Extendable Platform Kits (EPKs) and software development solutions for the emergent RISC-V ecosystem, to help accelerate their adoption.” said Simon Davidmann, CEO of Imperas.

Norbert Weiss, international sales and marketing manager and head of marketing at Lauterbach commented: “For many years, Lauterbach TRACE32 has supported AndeStar™ V3 architecture and cores. We are happy to continuously support the new V5 processors, N25 and NX25, RISC-V based with enhanced extension architecture. With TRACE32, the developers who are creating products around Andes new V5 processors have access to a full range of debug functionality, from bootstrap code to interrupt routines and drivers. ”

“Mentor’s work with Andes means that mutual customers are assured that the best emulation platform support is available for the Andes’ N25 and NX25 processor IP’s,” said Eric Selosse, vice president and general manager of the Mentor Emulation Division. “Our support for the V5 AndesCore processors, on the Veloce® emulation platform, helps streamline and simplify the design and creation of SoCs based on the N25 and NX25.”

“UltraSoC is committed to increasing the number of silicon design starts, and our participation in Andes V5 processors,” said Rupert Baines, CEO of UltraSoC, “We are committed to supporting the adoption of RISC-V throughout the semiconductor industry, both through our membership in the RISC-V Foundation and via individual partnerships. Making UltraSoC’s on-chip trace and debug IP available through Andes V5 processors will enable chipmakers everywhere to leverage the benefits of open source hardware and introduces new innovative designs to the market.”

Andes, the first mainstream CPU IP vendor to adopt RISC-V instruction set architecture, has been actively contributing for GNU and LLVM toolchains since it joined the RISC-V Foundation. The V5 NX25 and N25 processors are fast and small 5-pipeline CPU IPs with abundant extension features based on feedback from customer interactions over the past 12 years. Andes is committed to driving the acceleration of the acceptance of the RISC-V with our partners.

About Imperas
Imperas provides methodologies, technologies and products to enable the efficient development, debug and test of software for embedded systems. Imperas users come from the processor IP market, semiconductor vendors, and embedded systems companies with strong requirements for software quality and reliability, as well as functional safety and security. Imperas virtual platform based products use Open Virtual Platforms (OVP) models and APIs, supporting over 180 different processor cores, including RISC-V cores. For more information about Imperas, please see www.imperas.com. Follow Imperas on twitter @ImperasSoftware, on LinkedIn and visit YouTube.

About Lauterbach
Lauterbach is the leading manufacturer of complete, modular and upgradeable microprocessor development tools worldwide with experience in the field of embedded designs since 1979. It is an international, well-established company with blue chip customers in every corner of the globe and has a close working relationship with all semiconductor manufacturers. The engineering team develops and produces highly proficient and specialized Development Tools, which are utilized all over the world under the brand TRACE32®.
http://www.lauterbach.com/

About Mentor Graphics
Mentor Graphics, a Siemens business, is a world leader in electronic hardware and software design solutions, providing products, consulting services, and award-winning support for the world’s most successful electronic, semiconductor, and systems companies. 
http://www.mentor.com

About UltraSoC
UltraSoC has semiconductor IP for debug (run control, trace, etc) for complex SoCs: making it easy to develop, optimize, fix bugs, reduce power consumption and reduce cost. This can be used pre‐silicon, to accelerate emulation and prototyping, or post‐silicon to support bring up, HW/SW integration or even in‐field/in‐use. UltraSoC has full support for RISC‐V (and other CPUs e.g. heterogeneous multi‐core), but debug addresses not just the CPU but across whole SoC. 
https://www.ultrasoc.com/ 

Continue ReadingAndes Announces Advanced SoC Development Environment for V5 AndesCore™ N25 and NX25 Processors with Tool Partners