Andes Technology Issues GDR to Be Listed on Luxembourg Stock Exchange for Expansion Plan

San Jose, California – October 29, 2021 – Andes Technology (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading RISC-V CPU IP supplier, announced today that it successfully issued its overseas depositary receipts (GDR) on the Luxembourg Stock Exchange on September 13. Each newly issued overseas depositary receipts unit will represent 2 ordinary shares, and its initial market value is priced at US$31.78, which is approximately NT$440 per share. A total of 4 million units are issued, representing 8 million shares of common stock. The total amount raised overseas is approximately US$127 million (NT$3.517 billion). Andes Technology is currently the only public RISC-V CPU IP supplier, and the GDR shareholders are mainly foreign institutional investors who aim for long-term investment.

“The funding allows Andes to achieve the main goal of boosting medium-term and long-term capital investing in R&D and expanding product lines, especially high-end products, “Frankwell Lin, Chairman and CEO of Andes Technology stated. “Moreover, global investors are able to share the fast-growing RISC-V market. To meet the urgent demand for RISC-V high-end computing solutions, the funds will be mainly put into accelerating the expansion of product design centers to strengthen our existing leading RISC-V product portfolio as well as speed up the development of high value and high-end RISC-V CPU IPs and SoC software and hardware integrated solutions. In order to seize the market of profitable high-end multicore CPU IPs and boost sales momentum, Andes’ design centers in Taiwan, United States and Canada plan to recruit 200 R&D talents to develop the next-generation RISC-V products for applications including 5G, artificial intelligence/machine learning, HPC, ADAS, automotive electronics, AR /VR, blockchain, cloud computing, data center, server, Internet of Things, MCU, storage devices, security, wireless devices, and other massive and high-performance computing markets.”

Andes reports revenue growth of 72.6% (YoY) in the first half of 2021 and 63% of the revenue is contributed by RISC-V products, including standard IP licensing and customization computing business. In addition, the revenue of 2020 is nearly doubled from that of 2018 when Andes started delivering its initial RISC-V cores. According to Counterpoint Research’s latest report, as semiconductor solutions require more and more versatile IPs, pure play semiconductor IP market size will grow at 11% CAGR to $8.6 billion per year by 2025. RISC-V is growing rapidly, due to its open-source advantage, easier power consumption optimization, reliable security functions and lower political risk impact. RISC-V processors will continue to see fast adoption across multiple categories including IoT, industrial and automotive, which are the key sectors with 28%, 12% and 10% adoption respectively by 2025. These favorable factors for market expansion will benefit Andes and its customers.

“Andes provides hardware IP, but just like software companies, our R&D manpower is a knowledge-intensive production line,” Dr. Charlie Su, President and CTO of Andes Technology said. “Since established, Andes has devoted tremendous resources into R&D and focused on developing the best processor IPs to shorten customer’s time-to-market. That is the main reason why Andes has been able to report record-breaking revenue throughout the years. To keep the growth momentum going, Andes will recruit more R&D talents around the world. Based on the solid foundation, we will extend our portfolio to cover more high-value products and address the demand for high-performance computing solutions and grow along with the booming market.”

Looking ahead to the coming decade, as more and more international technology companies are embracing RISC-V and expanding their market and applications, Andes is determined to continue to drive the RISC-V momentum as the leading pure play processor IP vendor. By leveraging years of extensive experience helping customers achieve mass production of diversified products, Andes will support even more RISC-V SoC design teams to introduce new products and its revenue and profit will advance with the soaring RISC-V market.

RISC-V in 2025

About Andes Technology

Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. To the end of 2020, the cumulative volume of Andes-Embedded™ SoCs has reached 7 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube!

Continue ReadingAndes Technology Issues GDR to Be Listed on Luxembourg Stock Exchange for Expansion Plan

Andes Technology USA Corp. Announces Major Expansion of Its U.S. Operation

Company Announces Job Openings for San Jose Headquarters and Portland R&D Office

San Jose, California October 8, 2021 – Andes Technology USA Corp., the headquarters of North America operations of Hsinchu, Taiwan-based Andes Technology Corporation, a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and founding premier member of RISC-V International, today announced a major expansion of Its U.S. operation. Andes Technology USA is greatly increasing engineering headcount in both the San Jose, California headquarters and its Portland, Oregon research and development facility. Andes Technology USA is seeking engineers in the U.S. and Canada to work remotely or in the Portland or San Jose offices. Openings are available for design engineers, verification engineers, and field application engineers.

Andes Technology USA Corp. was established in 2015 as a California corporation coincident with Andes Technology Corp. joining RISC-V International. After Andes took the RISC-V instruction set architecture (ISA) as the base to form its fifth generation architecture, AndeStar™ V5 and started developing V5 processor IP’s, the U.S. operation was formed to be nearby early customer adopters of the new ISA. The U.S. subsidiary established an R&D lab shortly thereafter and began developing architectures for the high-end RISC-V processors. In under a year the investment together with the main engineering team in Taiwan yielded the first commercial RISC-V Vector processor IP which won nearly 10 projects including datacenter projects from a large OEM so far.

“Major semiconductor companies worldwide adopting the RISC-V ISA and the RISC-V International work groups rapid development of the RISC-V ISA extensions is driving demand for engineers to keep up with the fast pace of new technology development,” said Emerson Hsiao, Andes Technology USA Corp. Chief Operating Officer. “RISC-V customers like the growing number of extensions coming available as well as their ability to customize the architecture to better fit their processing requirements. Our tool Andes Custom Extensions (ACE) makes the customization process easier and less risky. To keep up with RISC-V technical developments and to serve our customers’ requests, we expect to greatly expand the size of our U.S. operation.”

Engineers interested in Andes are encouraged to view the open positions on the Andes Technology LinkedIn page.

 

About Andes Technology USA Corp.
Andes Technology USA Corp. was formed as a California corporation in 2015 in San Jose California to develop high-end CPU architectures. Emerson Hsiao, Chief Operating Officer heads the office, located in the heart of Silicon Valley in San Jose. In June 2018, the U.S. operation added its R&D facility in Portland, Oregon to attract engineers in the Pacific Northwest and Canada. To date, the U.S. operation continues to develop new high-end CPU processor architecture. Its most significant achievement is the development of the first RISC-V vector architecture based on the RISC-V International RVV specification. Andes developed the first RISC-V vector architecture based on version V0.8 of the specification and has advanced it to the latest to-be-ratified version.

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation architecture AndeStar™ adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. To the end of 2020, the cumulative volume of Andes-Embedded™ SoCs has surpassed 7 billion.

About RISC-V AndesCore™
Andes Technology’s comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications. From 2017, Andes expands its product line to RISC-V processors and provides a total solution in V5 family cores, including N22, N25F/NX25F, D25F, A25/AX25, A25MP/AX25MP, A27/AX27/NX27V, A45/D45/N45, AX45/DX45/NX45 and A45MP/AX45MP.

For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube!

Contact Information
Andes Technology –  hr@andestech.com

Continue ReadingAndes Technology USA Corp. Announces Major Expansion of Its U.S. Operation

Andes Technology Corp. Brings Its Broad Family of RISC-V CPU IP to the Silicon Catalyst Semiconductor Incubator

Hsinchu, Taiwan and Silicon Valley, CA – September 8, 2021 – Andes Technology Corporation (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today announced that it has joined Silicon Catalyst’s In-Kind Partner program. Andes Technology will make available a wide range of its RISC-V processors to startups participating in the Silicon Catalyst incubator program.

These include all Andes RISC-V offerings between the smallest N22 to its multicore 5-stage pipeline 25 and 27 families with P extension, floating point, L2 cache controller and memory management unit. Incubator startups will also have access to Andes’ AE250 Pre-integrated AHB platform, AE350 Pre-integrated AXI platform, and AndeSight Eclipse-based Integrated Development Environment.

“Andes has been helping a steady stream of new design starts to incorporate our wide range of RISC-V AndesCore™ processors,” said Dr. Charlie Su, President and CTO of Andes Technology. “Silicon start-ups such as those in the Silicon Catalyst incubator program are ideal examples of the new ventures. Many have great products on papers but need the IP and tools to lift their design from the page and implement it in silicon. The Silicon Catalyst incubator and Andes provide them the perfect environment and high efficiency RISC-V CPU IPs to achieve this goal. We are delighted to be part of this endeavor.”

“We applaud Andes’ initiative in expanding the reach and visibility of the RISC-V ISA,” said Calista Redmond, CEO of RISC-V International. “As an open computing platform, the continued growth and adoption of RISC-V depends on a broad ecosystem of hardware and software tools and IP. Andes contributing its silicon-proven RISC-V IP to the Silicon Catalyst incubator will help make it easier for emerging startups to build the next generation of semiconductor applications with RISC-V.”

The mission of Silicon Catalyst is to lower the capital expenses associated with the design and fabrication of silicon-based IC’s, sensors, and MEMS devices. For over seven years, the Silicon Catalyst partner ecosystem has enabled early-stage companies to build complex silicon chips at a fraction of the typical cost. Silicon Catalyst has created a unique ecosystem to provide critical support to semiconductor hardware start-ups, including tools and services from a comprehensive network of In-Kind Partners (IKPs). The Portfolio Companies in the incubator utilize IKP tools and services including design tools, simulation software, design services, foundry PDK access and MPW runs, test program development, tester access, and banking and legal services. Additionally, the startups can tap into the world-class Silicon Catalyst network of advisors and investors.

“Adding a tier one RISC-V IP supplier such as Andes Technology; with its broad range of IP, hardware design tools, and integrated software development environment; broadens the selection of design IP and tools our incubator companies have to create with,” said Paul Pickering, Managing Partner at Silicon Catalyst. “Andes’ success with startups in the emerging 5G and AI chip markets demonstrates their understanding of nurturing new ventures building products for markets that are just beginning to field large numbers of new silicon designs. We are pleased to have them join the Silicon Catalyst incubator and look forward to seeing new designs containing their IP.”

About  Silicon Catalyst
It’s About What’s Next® – Silicon Catalyst is the world’s only incubator focused exclusively on accelerating solutions in silicon (including IP, MEMS & sensors), building a coalition of in-kind and strategic partners to dramatically reduce the cost and complexity of development. More than 400 startup companies have engaged with Silicon Catalyst since April 2015, with a total of 38 startup and early-stage companies admitted to the incubator. With a world-class network of mentors to advise startups, Silicon Catalyst is helping new semiconductor companies address the challenges in moving from idea to realization. The incubator/accelerator supplies startups with a path to design tools, silicon devices, networking, access to funding, banking and marketing acumen to successfully launch and grow their companies’ novel technology solutions. The Silicon Catalyst Angels was established in July 2019 as a separate organization to provide access to seed and Series A funding for Silicon Catalyst portfolio companies.

More information is available at www.siliconcatalyst.com and www.siliconcatalystangels.com

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation architecture AndeStar™ adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. To the end of 2020, the cumulative volume of Andes-Embedded™ SoCs has surpassed 7 billion.

For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube!

About RISC-V AndesCore™
Andes Technology’s comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications. From 2017, Andes expands its product line to RISC-V processors and provides a total solution in V5 family cores, including N22, N25F/NX25F, D25F, A25/AX25, A25MP/AX25MP, A27/AX27/NX27V, A45/D45/N45, AX45/DX45/NX45 and A45MP/AX45MP.

For more information about Andes Technology products, please visit http://www.andestech.com/

Contact Information
Andes Technology – Jonah McLeod, jonahm@andestech.com
Silicon Catalyst – Richard Curtin, richard@siliconcatalyst.com

Continue ReadingAndes Technology Corp. Brings Its Broad Family of RISC-V CPU IP to the Silicon Catalyst Semiconductor Incubator

Andes Technology and Cyberon Collaborate to Provide Edge-Computing Voice Recognition Solution on DSP-capable RISC-V Processors

Press highlights:

  • Cyberon DSpotter, the voice wake-up and local command recognition solution, supports Andes RISC-V CPU families
  •  The local and offline command recognition provides users with a quick-response voice operation interface, protects personal privacy, and also reduces the development and maintenance costs of the device manufacturers.
  •  AndesCore™ D25F with DSP/SIMD P-extension instructions boosts the computing performance and efficiency for voice processing to provide competitive voice recognition and voice assistant solutions on edge devices

HSINCHU, TAIWAN – August 19, 2021 – Cyberon Corporation, a leading embedded speech solution provider, and Andes Technology (TWSE: 6533), a major supplier for high efficiency, low-power 32/64-bit RISC-V processor cores, announced their collaboration on the edge-computing voice recognition solution, Cyberon DSpotter, by exploring Andes DSP-capable RISC-V CPU cores such as the popular D25F and comprehensive software development environment to provide a cost-effective, high performance, and easy-to-deploy solution.

The development of AI technology has recently brought tremendous progress in speech recognition. In addition to voice assistant services based on cloud-computing architecture, there are growing demands for local voice recognition by edge-computing devices from the market. Locally executed offline command recognition provides users with a quick-response voice operation interface, protects personal privacy, and reduces the development and maintenance costs of the device manufacturers.

For many products that have a strong demand for voice control, such as wearable devices, home appliances, IoT devices, etc., low computing resource requirements and high recognition performance are important considerations. Therefore, Cyberon based on more than 20 years of professional experience, introduces its new generation algorithm, DSpotter, for voice wake-up and local command recognition.

Different from most solutions in the market, Cyberon’s DSpotter adopts phoneme-based acoustic model to improve customers’ product development efficiency. Developers do not need to collect a large amount of training corpus in advance. They can create the required commands by simply entering text. Based on the relevant foundation built over the past years, Cyberon has developed more than 40 global languages for DSpotter. It helps customers to introduce their products to the global market in a timely manner. Regarding the recognition performance, DSpotter has high accuracy and high noise robustness due to the strength of its acoustic model consisting of TDNN-F architecture. In addition, the algorithm has been well optimized by Cyberon to fit into general MCU platforms without using a dedicated neural network processor. In this way, manufacturers can provide products with voice interfaces through cost-effective hardware.

Furthermore, the performance of DSpotter is increased significantly by leveraging RISC-V DSP/SIMD P-extension (RVP) instructions on AndesCore™ D25F, a 32-bit RISC-V CPU core with highly optimized 5-stage pipeline. The RVP enables multiple data in integer registers to be processed in one single cycle, thus efficiently boosts the computations for voice, audio, image and signal processing. It also greatly improves performance for edge AI involving the above data types. The D25F is the first market-proven RISC-V RVP-capable processor, and has the most complete ecosystem in development tools, libraries for DSP and neural networks, and audio/voice codec.

“The AI technology of edge computing has gradually entered people’s lives,” said Alex Liou, VP of Cyberon Embedded solution BU. “Cyberon’s DSpotter algorithm helps developers to reduce development costs of voice recognition applications. We offer a convenient and easy-to-use tool to create customized commands of global languages. Developers can create various voice recognition applications efficiently to meet the strong and diverse demands of the market. The collaboration with Andes extends the application of DSpotter technology to RISC-V platforms and demonstrates excellent computing and recognition performances. It is hoped that it will bring more products with intelligent and convenient voice interface to people’s lives.”

”Intelligence is now in everyone’s daily life empowering not only by cloud computing but also by edge computing,” said Simon Wang, Technical Marketing Manager of Andes Technology, and in charge of RISC-V compute acceleration ecosystem. “Andes offers a comprehensive 32 and 64 bit RISC-V processor core series with high computation efficiency and low power consumption for general computing solutions. In addition, we provide AI solutions based on RVP, RVV and ACE instruction extensions with the support of Andes NN SDK and have been cooperating with partners to extend our solutions. We are excited to work with Cyberon to offer very competitive voice recognition and voice assistant solutions for edge devices based on the strength of AndesCore™ D25F, esp. its RVP support.”

About Cyberon Corporation
Cyberon Corporation, with its headquarter in New Taipei City, Taiwan, is a leading speech solution provider. Established in 2000, Cyberon has rich experiences in speech algorithm and application development. Its speech recognition and text-to-speech technologies have been widely adopted by IOT devices, home appliances, wearable devices, smart toys, automotive equipment, and enterprise customers. Cyberon provides a full range of voice solutions for embedded MCU/DSP, OS platforms, and server-based services, and is committed to providing users with natural and convenient human-machine voice interfaces. For more information, please visit http://www.cyberon.com.tw

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. To the end of 2020, the cumulative volume of Andes-Embedded™ SoCs has reached 7 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube! 

Continue ReadingAndes Technology and Cyberon Collaborate to Provide Edge-Computing Voice Recognition Solution on DSP-capable RISC-V Processors

Andes Technology Announces over 2 Billion Shipments of Andes-Embedded SoCs in 2020

The Cumulative Shipments Reached a Remarkable 7 Billion by 2020

HSINCHU, TAIWAN – July 2, 2021– Andes Technology (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores, announced a remarkable record of 2 billion annual SoC shipments containing its CPU IPs in 2020 at an annual growth rate of 33%. Since inception, the cumulative shipments surpassed 7 billion by the end of 2020. Applications of SoC in which Andes CPU IPs are embedded include audio, Bluetooth, gaming, GPS, machine learning, MCU, sensor fusion, SSD controllers, touch screen and TDDI controllers, storage device, voice recognition, wireless charger and more.

“Although the pandemic has impacted the global economy, the SoC shipments containing Andes CPU IPs still hit a record high. Most of the 2 billion shipments in 2020 are Andes processors of the third generation architecture (V3), but Andes’ RISC-V series IPs launched in 2017 have started to contribute royalties as well,” said Frankwell Lin, CEO of Andes Technology. “While the proportion of royalties from our RISC-V cores is still low, with the momentum of our RISC-V core licensing, we believe they will grow to dominate our royalties and become a significant part of our revenue in a much faster pace than our V3 processors. Also, Andes has continued to devote itself to contributing the RISC-V community by playing a leading role in the Board and Technical Steering Committee of the RISC-V International to influence RISC-V technical planning, business strategy, and ecosystem development.”

“The production quantity of SoCs embedded with Andes processors reaches nearly 5.5 million units per day. According to the latest forecast of 2021 Semico Research, the CAGR for RISC-V cores between 2020 and 2025 will reach 115%,” said Charlie Su, President and CTO of Andes Technology. “The key advantages of RISC-V are modularity, extensibility and compactness. They help drive the diversified applications of Andes’ customers, ranging from using only one core to over 1,000 cores on a single chip, including 5G, AI/machine learning, ADAS, AR/VR, blockchain, cloud computing, data center, IoT, sensing, storage, security, wireless and so on. As the leading RISC-V processor IP provider, Andes has launched a variety of RISC-V CPU cores, which are flexible with high performance efficiency and low power consumption in design. They also come with comprehensive software development environment, compute library, AI compiler support and open security framework. As Andes’ product portfolio covers a wider variety of emerging applications, we provide our customers with more options for different needs and help them build competitive solutions for specific fields.”

About Andes Technology

Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and the cumulative volume has reached 7 billion by the end of 2020. For more information, please visit https://www.andestech.com

About RISC-V AndesCore™

Andes Technology’s comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications. From 2017, Andes expands its product line to RISC-V processors and provides a total solution in V5 family cores, including N22, N25F/NX25F, D25F, A25/AX25, A25MP/AX25MP, A27/AX27/NX27V, A45/D45/N45 and AX45/DX45/NX45.

Continue ReadingAndes Technology Announces over 2 Billion Shipments of Andes-Embedded SoCs in 2020

IAR Systems extends development tools performance capabilities for Andes RISC-V cores

Latest version of IAR Embedded Workbench for RISC-V adds support for latest Andes RISC-V processor technology, including AndeStar™ V5 RISC-V Performance Extension

Uppsala, Sweden—June 23, 2021— IAR Systems®, the future-proof supplier of software tools and services for embedded development, presented a new version of its professional development tools for RISC-V. With the latest release, the complete development toolchain IAR Embedded Workbench® for RISC-V adds support for latest Andes RISC-V extension and devices, enabling maximized performance in RISC-V-based applications.

Through its excellent optimization technology, IAR Embedded Workbench for RISC-V helps developers ensure the application fits the required needs and optimize the utilization of on-board memory. With the support of the AndeStar™ V5 RISC-V Performance Extension, developers can use IAR Embedded Workbench to create applications with increased performance and reduced code size. The toolchain supports all Andes 32-bit V5 RISC-V cores, including the N22, N25F, D25F, A25, A27, N45, D45 and A45. The RISC-V Packed SIMD/DSP extension specification (RVP draft) and the corresponding intrinsic functions as well as Andes DSP libraries are supported.

“AndeStar V5 RISC-V architecture brings the unique and competitive value to our RISC-V customers,” said Dr. Charlie Su, Andes Technology President and CTO. “V5 offers full compatibility to the compact, modular and extensible RISC-V technology by supporting its standard instructions. In addition, it incorporates Andes-extended features already proven in 7+ billion AndeStar V3 processors, such as Performance extension and CoDense™ extension, to applications from edge to cloud. We welcome that IAR Systems provides full support to V5 processors and brings the benefits of IAR Embedded Workbench to the RISC-V community.”

IAR Embedded Workbench for RISC-V is a complete C/C++ compiler and debugger toolchain with everything embedded developers need integrated in one single IDE. To ensure code quality, the toolchain includes C-STAT® for static code analysis. C-STAT proves code alignment with industry standards like MISRA C:2012, MISRA C++:2008 and MISRA C:2004, and also detects defects, bugs, and security vulnerabilities as defined by CERT C and the Common Weakness Enumeration (CWE). For companies working with safety-critical applications, IAR Embedded Workbench for RISC-V is available in a functional safety edition certified by TÜV SÜD according to IEC 61508, ISO 26262, IEC 62304, EN 50128, EN 50657, IEC 60730, ISO 13849, IEC 62061, IEC 61511 and ISO 25119, delivering qualified tools, simplified validation and guaranteed support through the product life cycle.

More information about IAR Systems’ offering for RISC-V is available at www.iar.com/riscv.

IAR Systems Contacts

AnnaMaria Tahlén, Media Relations & Content Manager, IAR Systems
Tel: +46 18 16 78 00 Email: annamaria.tahlen@iar.com
Tora Fridholm, Chief Marketing Officer, IAR Systems
Tel: +46 18 16 78 00 Email: tora.fridholm@iar.com

About IAR Systems
IAR Systems supplies future-proof software tools and services for embedded development, enabling companies worldwide to create the products of today and the innovations of tomorrow. Since 1983, IAR Systems’ solutions have ensured quality, reliability and efficiency in the development of over one million embedded applications. The company is headquartered in Uppsala, Sweden and has sales and support offices all over the world. Since 2018, Secure Thingz, the global domain expert in device security, embedded systems, and lifecycle management, is part of IAR Systems Group AB. IAR Systems Group AB is listed on NASDAQ OMX Stockholm, Mid Cap. Learn more at www.iar.com.

#IAR Systems, #IAR Embedded Workbench, #Embedded Trust,#C-Trust,#C-SPY, #C-RUN, #C-STAT, #IAR Visual State, #IAR KickStart Kit, #I-jet, #I-jet Trace, #I-scope, #IAR Academy

Continue ReadingIAR Systems extends development tools performance capabilities for Andes RISC-V cores

AndesBoardFarm Enables SoC Designers to Explore RISC-V Processors in Online FPGA Board Collection

HSINCHU, TAIWAN – June 9, 2021 – Andes Technology Corporation (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and founding premier member of RISC-V International, today announced “AndesBoardFarm”, a collection of on-line accessible FPGA boards and management software for SoC designers to experience the AndesCore™ RISC-V processors remotely from their local sites. By using the comprehensive AndeSight™ integrated development environment provided by Andes, designers can interactively try out their own software on Andes’ latest CPU cores over the internet to experiment on the performance test and get the results directly; at the same time, they can also explore the various hardware and software features offered by Andes. By taking advantage of the AndesBoardFarm services, the time and efforts for evaluating RISC-V processors will be greatly reduced, and designers will be able to pinpoint the best RISC-V CPU(s) for their SoCs with confidence.

“Creating a complex SoC with many RISC-V cores and developing applications to fully exploit the hardware features concurrently is a complex undertaking,” said Dr. Charlie Su, President and CTO of Andes Technology Corp. “Facing all the dynamics due to design complexity and fast changing requirements, it takes great visions to decide and secure the IPs that are most advantageous to their projects. To assist SoC design teams to determine the most suitable AndesCores from their own perspectives, Andes Technology created a collection of FPGA boards connected to a secure server complex and implemented secure management software. Customers can apply for an account and upload their program to an available board on the AndesBoardFarm site to save the efforts to work toward concluding their needs.” 

AndesBoardFarm FPGA boards accommodate all Andes RISC-V offerings embedded in reference SoC designs, including 32-bit and 64-bit processors with a single core or multi-core, and optional features such as MMU for Linux application, SIMD instructions for multimedia processing and vector extensions for AI and other complex computations with large volume of data.  For more information, please contact sales@andestech.com.

AndesBoardFarm

About Andes Technology
Andes Technology (TWSE: 6533) was established in Hsinchu Science Park in 2005. Sixteen years in business and a founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture (V5) adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. To the end of 2020, the cumulative volume of Andes-Embedded™ SoCs has surpassed 7 billion.

About RISC-V AndesCore™
Andes Technology’s comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications. From 2017, Andes expands its product line to RISC-V processors and provides a total solution in V5 family cores, including N22, N25F/NX25F, D25F, A25/AX25, A25MP/AX25MP, A27/AX27/NX27V, A45/D45/N45 and AX45/DX45/NX45.
For more information about Andes Technology, please visit: http://www.andestech.com/

Continue ReadingAndesBoardFarm Enables SoC Designers to Explore RISC-V Processors in Online FPGA Board Collection

PUFsecurity and Andes Technology Cooperate to Integrate Crypto Coprocessor PUFiot into RISC-V AIoT Security Platform

HSINCHU, TAIWAN – June 2nd, 2021 –PUFsecurity, a security solutions IP company, and Andes Technology (TWSE: 6533), a leading RISC-V CPU IP vendor, are the first to incorporate PUFsecurity’s PUFiot crypto coprocessor with Andes Technology’s D25F CPU and its associated platform AE350. With this successful integration, PUFiot will become a part of the AndeSentry™ security framework from Andes Technology, offering a rich set of security solutions for the RISC-V ecosystem.

PUFsecurity jointly develops the security solution PUFiot with eMemory (TWSE: 3529), combining eMemory’s innovative NeoPUF, a physically unclonable function (PUF) that could be the chip fingerprint, along with the leading anti-fuse one-time programmable (OTP) memory, NeoFuse, and PUFsecurity’s root of trust and NIST CAVP-certified cryptographic engines (including symmetric/asymmetric ciphers, hashes, key wrapping, message authentication, etc.). Featuring multiple analog/digital anti-tampering designs to prevent both invasive attacks (such as those utilizing focused ion beam, FIB) and non-invasive ones (such as side-channel analysis), PUFiot provides a solid security boundary for chip protection.

Using PUF-derived chip fingerprints to internally generate key pairs and inborn IDs, PUFiot lowers the cost of supporting zero-touch deployment to meet the secure onboarding requirements of AI/IoT/5G multi-terabyte, networked devices. In other words, PUFiot can assist cloud-based application ecosystems in achieving zero-trust compliant security operations.

Andes Technology’s RISC-V D25F is a 32-bit high-performance processor core that supports single/double-precision floating-point operations, RVP P-extension (DSP/SIMD) instructions and Physical Memory Protection (PMP). The pre-integrated AE350 platform comprises AHB/AXI bus matrix, interrupt control, debug module, and commonly used peripherals such as GPIO, I2C, PWM, QSPI, UART, and WatchDog Timer. It greatly simplifies the SoC construction for customers. D25F processor with the AE350 platform have already been licensed to many customers for use in a broad range of market, including the emerging AIoT applications.

AndeSentry™ security framework enables open collaboration and brings out a variety of security solutions. Now included in AndeSentry™, PUFiot provides secure storage, root of trust, and hardware cryptographic engines. When integrated with the D25F+AE350 platform, PUFiot supports system-level security features such as secure boot/OTA (over-the-air) updates and firmware/software protection. The combined solution is ideal for the growing secured AIoT applications.

The successful partnership between Andes Technology and PUFsecurity is a significant milestone for the security IP industry, which will lead to the development of even more cost-effective hardware security solutions for the RISC-V ecosystem.

About PUFsecurity
PUFsecurity is a subsidiary of eMemory and is dedicated to innovating PUF-based security solutions. By leveraging our technical acumen and achievements, including core IPs such as NeoPUF and OTP from eMemory, PUFsecurity brings PUF-based security to the market. The latest solutions include the integrated, five-in-one hardware root-of-trust module (PUFrt) and PUF-based crypto co-processor (PUFiot). PUFsecurity offers hardware security IP solutions with superior performance and cost-efficiency in a wide range of process nodes with our proven industry expertise.
For more information please visit: http://www.pufsecurity.com

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and the cumulative volume has reached 7 billion.
For more information, please visit https://www.andestech.com

About RISC-V AndesCore™
Andes Technology’s comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications. From 2017, Andes expands its product line to RISC-V processors and provides a total solution in V5 family cores, including N22, N25F/NX25F, D25F, A25/AX25, A25MP/AX25MP, A27/AX27/NX27V, A45/D45/N45 and AX45/DX45/NX45.
For more information about Andes Technology, please visit: http://www.andestech.com/

Continue ReadingPUFsecurity and Andes Technology Cooperate to Integrate Crypto Coprocessor PUFiot into RISC-V AIoT Security Platform

Andes Announces the New Upgrade of AndeSight™ IDE v5.0: a comprehensive software solution to accelerate RISC-V AI and IoT developments

Press Highlights:

  • AndeSight™ IDE v5.0 is to be released in mid-2021
  • Highlights of its features for AI and IoT applications include software solutions for RISC-V DSP/SIMD and Vector extension; Andes Neural Network (NN) Library; AndesClarity™ processor pipeline analyzer; debugging automation and scripting; multicore debugging; Linux LTS v5.4; and FreeRTOS and Zephyr

HSINCHU CITY, TAIWAN – April 23, 2021 –Andes Technology Corporation (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today announced the new upgrade of AndeSight™ IDE v5.0, which targets to accelerate RISC-V AI and IoT developments by strengthening several innovative and useful features.

AI and IoT applications are blooming everywhere. The products serving the market must not only come with good performance, high efficiency, and low power consumption to meet the constraints for computing and energy, but also need to reduce time-to-market to respond to the ever-changing market needs. AndeSight™  IDE v5.0 rolls out new functions to address those issues, and brings the ultimate runtime performance and development efficiency to users.

The Core for AI Computations: RISC-V DSP/SIMD extension (RVP), vector extensions (RVV), and the tools and runtime from AndeSight™ IDE

RVP exactly addresses the balance between low-volume data computation and power consumption. By providing the compact SIMD (Single Instruction Multiple Data) and DSP (Digital signal processing) capability, it forms a very competitive basis for the TinyML, AIoT, and signal processing applications on edge and endpoints. RVV targets high-volume data computation, no matter in the edge or cloud, it provides very scalable, efficient, and powerful compute capabilities for general AI, NN, and data processing applications.

To unlock the potential of a powerful ISA extension, a simple and straightforward programming model is critical. AndeSight™ IDE v5.0 supports toolchains for the standard-bound specification of RVP and RVV, highly-optimized DSP and Vector libraries, intrinsic functions, and sample codes to guide code optimization. A key advantage is that software developers can build applications completely in C using efficient intrinsic and optimized libraries APIs, freeing developers from writing error-prone assembly code, and matching the performance of the same applications built with hand-code assembly.

To explore the full capabilities of processors and achieve the ultimate performance, an advanced processor pipeline analyzer is needed. AndesClarity™ visualizes the performance and resource bottleneck. Stall bubbles and data dependency are shown clearly along with the instructions, the C source code, and hardware functional units.

In addition, Andes provides the “Andes NN Library” that dramatically speeds up the development of Neural Network algorithms. It achieves a 66x speedup of MobileNet-v1 with half-precision floating-point, 256-bit SIMD width, and 512-bit vector length over RISC-V baseline extension. Moreover, “TensorFlow Lite for Microcontroller” can execute all built-in NN models with Andes NN Library on development boards.

Develop Up-to-date RTOS and Linux Applications along with AndeSight™ IDE Powerful Tools

AndeSight™ IDE v5.0 supports Linux LTS (Long-Term Support) kernel v5.4, and the popular RTOS such as FreeRTOS and Zephyr. Andes Linux kernel has verified with LTP (Linux Test Project), and seamlessly booted with Fedora or Debian Linux distro on Andes development boards along with the device drivers. To provide a smaller image for embedded Linux applications, Andes also offers RISC-V 32-bit Linux kernel to run on the corresponding Andes processors. Andes FreeRTOS port has passed the “AWS Qualification Program for RTOS”, which validates the pre-integrated port on microcontroller-based boards by AWS (Amazon Web Service)1. Andes Zephyr port supports SMP (Symmetric Multi-Processing) and has been verified on Andes RISC-V multicore. Developers only need to focus on the application itself and do not need to worry about the fundamental software.

To further enhance the ultimate debugging efficiency, the versatile features of scripting and grouping are enabled by AndeSight™ IDE. AndeSight™ scripting can record the UI operations from one developer, and replay on another environment. It saves time to reproduce issues from the field. Similar to GDB Python scripts feature, users can automate and scale the debugging procedures with Python programming. “Core Grouping” is a useful feature to allow users to develop the multicore software with separate build and debug configurations, and sending debug commands to a specific set of cores at the same time.

AndeSight™ IDE v5.0 comprehensive features enriched from 16-year continuous development, including but not limited to the outstanding toolchains, highly-optimized C libraries, AndeSim™ near cycle simulator, easy-to-use profiling and analyzing tools, virtual hosting, RTOS awareness, and abundant reference codes.

“We are excited to announce that AndeSight™ IDE v5.0 is ready for release. AndeSight™ IDE v5.0 is the new milestone of our RISC-V software solutions. It is the latest Andes offering for RISC-V community, and we expect it to speed up RISC-V SoC development to a new level.” said Andes President and CTO Dr. Charlie Su. “Comprehensively optimized tools and runtime are the other sides of a coin. Processors cannot work efficiently and perform outstandingly without matching software solutions. We’ll continue to invest in our RISC-V software solutions to bring the best performance for RISC-V processor solutions to the RISC-V community.”

AndeSight™ IDE v5.0 will be available for licensing after June 2021. For more details of the AndeSight™ features, please visit Andes Webinar (http://www.andestech.com/en/webinar_en/) and register the talk “Accelerating RISC-V AI and IoT Development with Andes Software Solutions” at 10:00 AM (CEST) and 09:00 AM (PDT) in Arp 28 (Thu.).

 

About Andes Technology
Andes Technology (TWSE: 6533) was established in Hsinchu Science Park in 2005. Sixteen years in business and a founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020. Up to the end of 2020, the cumulative volume of Andes-Embedded™ SoCs has reached 6 billion.

About RISC-V AndesCore™
Andes Technology’s comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications. From 2017, Andes expands its product line to RISC-V processors and provides a total solution in V5 family cores, including N22, N25F/NX25F, D25F, A25/AX25, A25MP/AX25MP, A27/AX27/NX27V, A45/D45/N45 and AX45/DX45/NX45.

For more information about Andes Technology, please visit http://www.andestech.com/

 1: https://devices.amazonaws.com/detail/a3G0h0000077Y9QEAU/Corvette-F1-N25

Continue ReadingAndes Announces the New Upgrade of AndeSight™ IDE v5.0: a comprehensive software solution to accelerate RISC-V AI and IoT developments

Silex Insight and Andes Technology Extend Strategic Partnership to Deliver Flexible and Scalable Root-of-Trust Security IP Solution

April 13, 2021
Silex Insight, Mont-Saint-Guibert, Belgium
Andes Technology, Hsinchu City, Taiwan
  • Silex Insight and Andes Technology offer the eSecure solution as part of the AndeSentry™ security framework.
  • The eSecure IP module, including security boot, sensitive key material and asset protection, is perfect for security-sensitive applications

Silex Insight, a leading provider for flexible security IP cores, and Andes Technology Corporation (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores, announce their strategic partnership to bring flexible and scalable Root-of-Trust security IP solutions integrated with RISC-V core to the industry.

Silex Insight’s advanced eSecure IP module, including security boot, sensitive key material and asset protection, is a complete solution that enables security applications to shield confidential information from untrusted applications running on a main processor. In the previous partnership, Andes Technology provided a high-efficiency and low-power RISC-V CPU core tightly integrated in the eSecure IP module to fully and robustly control the execution of security functions. The eSecure module is highly configurable and thus provides a wide-range selection of security features, which can be adapted for any application for performance, area and energy consumption. Andes RISC-V processors together with eSecure have been used in a wide variety of SoCs ranging from microcontrollers to data center servers, and for different purposes such as communication, and video applications.

Silex Insight and Andes Technology extend their partnership by offering the eSecure solution as part of the Andes security framework called AndeSentry™. With the combination of Silex Insight’s eSecure IP module and Andes’ versatile RISC-V processors, customers can authenticate and protect their solution in the field easily. Furthermore, customers can perform secure failure analysis/RMA (certificate based, set permissions levels, public key cryptography).
“We are able to deliver a one-stop-shop and ready-to-go solution to SoC makers who need advanced security and efficiency”, said Pieter Willems, VP of Global Sales and Marketing of Silex Insight. “With Andes Technology’s high efficiency and low-power RISC-V CPU core together with our eSecure Root-of-Trust turnkey solution, customers who demand high security on their devices can easily prevent hostile attacks from the outside world and at the same time perform end-to-end secure debugging”.

“Through our popular RISC-V processors, we have been engaged with a wide variety of customer applications. We observe that security is becoming fundamental now to all devices and connected services. Therefore we have gathered all our security solutions under one framework called AndeSentry™, where Silex Insight plays an important role with their top-notch performance solutions,” said Dr. Charlie Su, President and CTO of Andes Technology. “We are excited to be able to deliver configurable and efficient security turnkey solutions, including Silex Insight’s eSecure IP module platform, to chip design teams which need highly reliable protection”.

This robust secure solution, including end-to-end secure debugging, is perfect for security-sensitive applications, and now it is available from both Silex Insight and Andes Technology.

About Silex Insight
Silex Insight is a recognized market-leading independent supplier of Security IP solutions for embedded systems and custom OEM solutions for AVoIP/Video IP codec. The security platforms and solutions from Silex Insight include flexible and high-performance crypto engines which are easy to integrate and an eSecure IP module that provides a complete security solution for all platforms. For custom OEM solutions for AVoIP/Video IP codec, Silex Insight provides high-end image and video compression solutions for distributing low latency, 4K HDR video over IP. Development take place at the headquarters near Brussels, Belgium.

> For more information, please visit www.silexinsight.com or follow Silex Insight on LinkedIn.

About Andes Technology
Andes Technology (TWSE: 6533) was established in Hsinchu Science Park in 2005. Sixteen years in business and a founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture (V5) adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. To the end of 2020, the cumulative volume of Andes-Embedded™ SoCs has reached 7 billion.

> For more information, please visit www.andestech.com.

MEDIA CONTACTS:

Silex Insight:

Jon Jacobsen
Marketing Manager
E: marketing@silexinsight.com
P: +32 475 50 30 37
Web: www.silexinsight.com

Andes Technology:

Hsiao-Ling Lin
Marcom Manager
E: hllin@andestech.com
P: +886-3-572-6533 ext 644
Web: www.andestech.com

Continue ReadingSilex Insight and Andes Technology Extend Strategic Partnership to Deliver Flexible and Scalable Root-of-Trust Security IP Solution