Andes Technology Is the First RISC-V Vendor to Accomplish ISO 26262 Functional Safety ASIL D Development Process Certification with SGS-TÜV Saar

The development and certification of embedded automotive safety systems will be
facilitated by Andes functional safety certified processors

HSINCHU, TAIWAN – February 15, 2022 – Andes Technology, a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today announced it has been certified to be compliant to the requirements of ISO 26262 standards for the development of automotive functional safety processor cores. SGS-TÜV Saar GmbH, as a functional safety certification body, had independently assessed and declared that Andes Technology’s systematic capability is up to the highest certification level of Automotive Safety Integrity Level (ASIL) D on the standards including all applicable parts 2, 4, 5, 6, 8 and 9 of ISO 26262. According to the official records, Andes is the first RISC-V processor IP vendor to get process certifications for both Hardware (ISO 26262-5) and Software (ISO 26262-6) in December 2020.

ISO 26262 is a series of standards to mitigate the risks of possible safety hazards. As today’s automobile electrical and electronic (E/E) systems are getting evermore complex, developers in the automobile supply chain are obligated to provide evidence to customers down the stream that their products are being addressed on all aspects in related to safety. Since ISO 26262 provides a common ground for E/E companies worldwide to meet that goal, by certifying ISO 26262 compliant, Andes demonstrates to the industry that it is committed to support automobile professionals in developing safety-related product lines.

“Andes Technology is among the best-in-class companies that SGS-TÜV Saar ever certified for ISO 26262,” said Jack Kuo, Director of Connectivity and Products Division at SGS Taiwan. “The basis of functional safety is built upon the fundamental activities such as specification, design, implementation, integration, verification and validation. Even before ISO 26262 certification, Andes already has a solid quality system for these development processes. On top of that, their experienced safety professionals had put in great efforts to adopt the ISO 26262, which is a key element of the scientific and technological state of the art in vehicle industry. These are the keys why we are able to conclude our independent assessments and certifications smoothly right within the planned schedule, which is quite an extraordinary experience for both of us.”

“Andes Technology has seventeen-year focus on developing a series of robust AndesCore™ processors running in billions of chips. We have hundreds of licensees, whose applications range from industrial MCU to enterprise storage, 5G stations and datacenter infrastructure.” said Dr. Charlie Su, President and CTO of Andes Technology. “As electronic components in road vehicles grow fast in number and complexity, their safety, availability and robustness are crucial to welfare of human being and green environment. The trend is a great opportunity and responsibility for us, and we take it very seriously. Instead of selectively picking partial standard clauses and self-claiming readiness, Andes chooses to work together with the industry leader SGS-TÜV Saar to ensure our development process is comprehensively compliant to all the applicable ISO 26262 functional safety standards. This shows our commitment to comply with the stringent and challenging requirements in automobile electrical and electronic supply chain.”

“SGS-TÜV Saar is accredited by the established German accreditation body DAkkS for the certification services it provides. We conducted numerous thorough reviews and found Andes Technology has internalized and followed the requirements for systematic functional safety developments. The governing processes provide adequate checks and balance; it is evident to us they are compliant to ISO 26262 series of standards and meets the criteria for ASIL D.” said Wolfgang Ruf, Functional Safety Product Manager Semiconductors of SGS-TÜV Saar GmbH. “We congratulate Andes Technology and welcome Andes to introduce its RISC-V CPU IP series to the automobile industry after completing its assessment and certification.”

Andes Technology’s first functional safety IP is under development and has been licensed by several customers in the early access program to develop automobile grade system-on-chip (SoCs) for various in-vehicle applications. This functional safety enabled solution is expected to be available for general licensing by the end of first quarter this year.

About SGS
SGS is the world’s leading inspection, verification, testing and certification company. We are recognized as the global benchmark for quality and integrity. With more than 96,000 employees, we operate a network of more than 2,600 offices and laboratories around the world. For more information, please visit https://www.sgs.com.tw/en/

About Andes Technology
Seventeen years in business and a Founding Premier member of RISC-V International, Andes (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion since 2021 and continues to rise. The cumulative volume of Andes-Embedded™ SoCs has reached 10 billion by the end of 2021. For more information, please visit https://www.andestech.com.

 Follow Andes Technology on Twitter, LinkedIn, YouTube and Facebook.

Continue ReadingAndes Technology Is the First RISC-V Vendor to Accomplish ISO 26262 Functional Safety ASIL D Development Process Certification with SGS-TÜV Saar

Andes Technology Corp. and Intel Foundry Services Bring RISC-V Solutions to Build an Open Ecosystem

Andes Joins IFS IP Alliance Program to Offer Industry Leading,
Optimized Open RISC-V IP with Integrated Software Solution

SAN JOSE, CA – Feb. 7, 2022– Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today announced that it has joined Intel Foundry Services’ effort to help build out its RISC-V intensive part of $1B Foundry Innovation Ecosystem. Andes Technology offers a wide range of RISC-V processors and integrated hardware/software development environments used to design diversified SoCs from low-power MCUs to innovative datacenter servers. With the launch of Intel Foundry Service Accelerator – IP Alliance Program and Intel’s decision to make a significant investment in the RISC-V ecosystem for open source software development, this partnership will bring significant competitiveness to customers that will leverage IFS to manufacture their RISC-V systems on chip.

Today, Andes’ complete AndeStar™ V5 RISC-V CPU IP families from the single-issue 25-series and 27-series to the superscalar 45-series are all available for IFS customers with hardware evaluation kit and software solution for easy SoC development and integration. Going forward, Andes’ RISC-V CPU IP families will support new IFS advanced processes when available.

“Active collaboration is the key to strengthen an ecosystem. We welcome Intel’s active participation to develop the RISC-V software ecosystem. We will provide our RISC-V processor platform and integrated software solution, on top of which Intel can base their development.” said Charlie Su, President and CTO of Andes Technology Corp. “The total SoC shipments of Andes customers have surpassed the milestone of 10 billion in 2021, with 3 billion in 2021 alone, while RISC-V based products have shown their high growth rate. We are happy to learn Intel Foundry Services will be actively involved in RISC-V ecosystem and manufacture RISC-V based chips. It will help our customers to deliver their innovated SoCs, especially in the crunch time of the foundry capacities. Andes and IFS become RISC-V ecosystem partners, and Andes is committed to supporting IFS’ customers with Andes RISC-V products and solutions as well.”

“We are thrilled to welcome Andes Technology Corp. into the Intel Foundry Service Accelerator IP Alliance program,” said Bob Brennan, VP and General Manager, Customer Solutions Engineering, Intel Foundry Services. “Designers targeting the Intel state of the art advanced process foundry can be assured of access to a robust, comprehensive design ecosystem, process technologies, advanced packaging technologies, and manufacturing capability. With this announcement, Intel Foundry Services is well positioned to offer IP optimized for all three of the industry’s leading ISAs: x86, Arm and RISC-V. With our ecosystem partners, Intel Foundry Services will bring an immense production capacity to greatly ease the global chip shortage that JPMorgan Chase predicts will drag into 2022. Certainly RISC-V based chips are welcome and supported.”

More and more major semiconductor companies worldwide adopt the RISC-V ISA and join the RISC-V Ecosystem. It in turn helps advance the RISC-V ISA to meet the fast pace of new technology developments. As a key player in the RISC-V ecosystem, Andes continues to invest in R&D talents to develop the next-generation RISC-V processors for the emerging applications such as 5G, ADAS, AI/machine learning, AR /VR, blockchain, cloud computing, data center server and HPC, IoT, storage, security, and wireless devices. The cooperation and commitment of two leading vendors will strengthen both RISC-V and IFS ecosystems and accelerate customer’s time-to-market.

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is publicly-listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion in 2021 and continues to rise. By the end of 2021, the cumulative volume of Andes-Embedded™ SoCs has surpassed 10 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube! 

Continue ReadingAndes Technology Corp. and Intel Foundry Services Bring RISC-V Solutions to Build an Open Ecosystem

Andes Technology Corp. Announces Joining the Intel Foundry Service Accelerator – IP Alliance Program

Andes Partners with IFS to Provide Leading Edge RISC-V CPU IP
To SoC Designers Using Intel’s State-of-the-Art Foundry Services

SAN JOSE, CA – February 7, 2022– Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today announce that Andes has joined the IP Alliance of Intel Foundry Services (IFS) Accelerator program. Andes provides comprehensive solution of RISC-V CPU IP cores from entry level to high-end products to meet application requirements from edge to cloud, including its highly demanded and recently upgraded RISC-V Superscalar Multicore A(X)45MP and Vector Processor NX27V. Designers building Andes-embedded RISC-V SoCs will have access to Intel Foundry Services’ leading-edge technology to provide increased, power-efficient performance.

“RISC-V is the 21st Century Instruction Set Architecture (ISA) created from a clean slate and freed from the hamstring of supporting a half century of backward compatibility,” said Frankwell Lin, CEO of Andes Technology Corp. “By providing a world-class foundry for this revolutionary new ISA, Intel Foundry Services will enable the leading edge silicon for 5G, ADAS, AI, AR/VR, data center, semiconductor storage, and HPC built around the RISC-V architecture. We are excited to be one of the lead IP partners in IFS Accelerator – IP Alliance program. Intel’s large scale foundry provides committed capacity for IFS customers which ensures that SoC designs based on Andes RISC-V processor cores will achieve the production ramp and volume successfully.”

“We are pleased to announce the IFS Ecosystem Alliance as a major step forward for Intel’s foundry ambitions,” said Randhir Thakur, President, Intel Foundry Services. “We are delighted to have Andes join the alliance. We look forward to partnering with Andes to extend their leadership IP with IFS for the benefit of our mutual global customers.”

The total SoC shipment of Andes customers surpassed the milestone of 10 billion in 2021. The SoCs cover a wide range of embedded electronics products such as 5G, automotive control, deep learning, AIoT, datacenters, image processing, networking, and storage. After joining IFS Accelerator – IP Alliance, Andes can support joint customers from SoC design to manufacturing seamlessly. The cooperation of two leading suppliers will strengthen both RISC-V and IFS ecosystems and accelerate customer’s time-to-market.

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is publicly listed company and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion in 2021 and continues to rise. By the end of 2021, the cumulative volume of Andes-Embedded™ SoCs has surpassed 10 billion. For more information,visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube! 

Continue ReadingAndes Technology Corp. Announces Joining the Intel Foundry Service Accelerator – IP Alliance Program

Imagination and Andes Jointly Validate GPU with RISC-V CPU IP

Partnership provides a complete compute solution and demonstrates the flexibility of combined IPs

London, England – 18th January, 2022 – Imagination Technologies and Andes Technology announces the successful testing and validation of the IMG B-Series Graphics Processing Units (GPU) with the RISC-V compliant Andes AX45, a 64-bit high performance-efficient and configurable superscalar Central Processing Unit (CPU). This validation partnership offers customers in AR/VR, In-Vehicle Infotainment (IVI) systems, Industrial and Internet of Things (IoT) products a proven, complete solution and lays the ground work for continuous testing.

The IMG BXE-2-32 GPU was validated alongside the Andes AX45 CPU as a part of a Field-programmable gate array (FPGA) platform, containing networking, memory and peripherals. The FPGA rendered numerous graphics workloads and benchmarks using a Linux based operating system. This FPGA demonstrates the flexibility of the IMG B-Series GPU and the interoperability of the Andes AX45 RISC-V CPU.

Colin McKellar, Vice President of Hardware Engineering, Imagination Technologies, says: “RISC-V is a CPU architecture that is going from strength to strength. Our work in validating the B-Series GPU with Andes AX45 RISC-V CPU highlights the flexibility of both platforms. The customizable nature of Imaginations ecosystem allowed for the rapid prototyping of a fully working system in less than a week, from integration to implementation and on to validation.”

McKellar continues: “Collaborating with Andes highlights the exceptional talent in both organisations. The ease of integration, both of the hardware and our teams paves the way for a highly beneficial ongoing partnership and shows that there are exciting alternatives to the current CPU incumbents.

Dr. Charlie Su, President and CTO of Andes Technology, says: “RISC-V ecosystem is growing rapidly. To continue its growth and showcase the many possible ways it can be deployed we partnered with Imagination to provide a quick and easy path to validated GPU IP blocks that can reduce SoC design time, risk and cost for our customers. With a flexibly designed GPU, and our highly configurable dual-issue AX45 RISC-V core, we were able to establish requirements for the system in a short time and generate the optimum configuration to provide a validated proof of concept.”

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. At the end of 2021, the cumulative volume of Andes-Embedded™ SoCs has reached 10 billion. For more information, please visit https://www.andestech.com.  

Follow Andes Technology on Twitter, YouTube, LinkedIn, and Facebook.

About Imagination Technologies
Imagination is a UK-based company that creates silicon and software IP (intellectual property) designed to give its customers an edge in competitive global technology markets. Its GPU, CPU and AI technologies enable outstanding power, performance, and area (PPA), fast time-to-market and lower total cost of ownership. Products based on Imagination IP are used by billions of people across the globe in their smartphones, cars, homes, and workplaces. See https://www.imaginationtech.com/.

Follow Imagination on Twitter, YouTube, LinkedIn, RSS, Facebook and Blog.

Imagination, PowerVR, and the Imagination Technologies logo are trademarks of Imagination Technologies Limited and/or its affiliated group companies in the United Kingdom and/or other countries. All other logos, products, trademarks, and registered trademarks are the property of their respective owners.

Andes Technology’s Press Contact:
Jonah McLeod     Jonahm@andestech.com     +001 510 449 8634
Hsiaoling Lin        hllin@andestech.com           +886 3 572 6533

Imagination Technologies’ Press Contacts:
David Harold       david.harold@imgtec.com     +44 (0)1923 260 511
Jo Jones              jo.jones@imgtec.com           +44 (0)1923 260 511

Continue ReadingImagination and Andes Jointly Validate GPU with RISC-V CPU IP

Ashling RiscFree™ now supports Andes Technology RISC-V CPUs

San Francisco, California – December 6, 2021 – RISC-V Summit 2021. Ashling and Andes Technology announced today that Ashling’s RiscFree™ Toolchain will be extended to support the broad range of Andes RISC-V CPU IPs including support for the AndeStar™ V5 Performance and CoDense™ ISA Extension.

RiscFree™ is Ashling’s Integrated Development Environment (IDE), Compiler and Debugger for RISC-V based development and now adds support for Andes RISC-V CPUs including the 32-bit: N22, N25F, D25F, A25, A25MP, A27, A27L2, N45, D45, A45 & A45MP and the 64-bit: NX25F, AX25, AX25MP, NX27V, AX27, AX27L2, NX45, AX45 & AX45MP.
“Ashling’s RiscFree™ with its Different Cores, One Solution feature set now brings the power of heterogeneous, multi-core debugging to Andes RISC-V CPU users allowing a single instance of RiscFree™ to debug any number of heterogeneous and homogeneous cores” said Hugh O’Keeffe, Managing Director of Ashling.

“We are delighted to have Ashling RiscFree™ support Andes RISC-V CPU cores and offer an additional choice for our customers, particularly those working on heterogeneous SoC designs utilizing AndesCore™ V5 RISC-V processors with increased performance and reduced code size” said Dr. Charlie Su, Andes Technology President and CTO.
For more information on Ashling’s RiscFree™ see: https://www.ashling.com/ashling-riscv/ and for details on Andes RISC-V CPU cores see: http://www.andestech.com/en/products-solutions/andescore-processors/.

Ashling_Andes

About Ashling
Ashling have been a leading provider of Embedded Development Tools & Services since 1982 with design centres in Limerick Ireland and Chennai India and sales and support offices in Europe, Asia Pacific, the Middle East and America. We have over thirty years’ experience in developing tools for embedded systems engineers including high-speed Debug and Trace Probes supporting a broad range of MCUs, SoCs and Soft (FPGA) based designs. Our software tools include IDEs, Debuggers, Compilers and Simulators and we support all the main embedded architectures including ARC, Arm, MIPS, Power Architecture and RISC-V through our RiscFree™ platform. We have a particular focus on RISC-V and are the first company to bring tools to the market supporting heterogenous debug of RISC-V cores along with cores from other vendors. Visit www.ashling.com for more details.
Contact Nadim Shehayed: nadim@ashling.com

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. At the end of Q3 2021, the cumulative volume of Andes-Embedded™ SoCs has reached 9 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube! 
Contact Hsiao-Ling Lin: hllin@andestech.com 

About RISC-V
The RISC-V open architecture ISA is under the governance of the RISC-V International. Visit https://riscv.org for more details

Continue ReadingAshling RiscFree™ now supports Andes Technology RISC-V CPUs

Codeplay Software partners with Andes Technology to achieve Software First SoC Design for AI-based applications using RISC-V Vector Processors

Codeplay’s Acoran Software Platform adds support for AndesCore™ NX27V.

San Francisco, California – December 6, 2021 – Codeplay Software®, the industry leader and pioneer in Open-Standard software tools and services for artificial intelligence, machine-learning, and high-performance computing announced support for Andes Technology Corporation’s AndesCore™ NX27V IP. Andes Technology is a leader in high-performance / low-power IP and a founding premier member of RISC-V International. The NX27V is an RV64GC vector processor supporting the RISC-V Vector specification with up to 512-bit VLEN and SIMD width (or DLEN). It allows SoC designers to create next-generation compute-acceleration solutions that leverage AI, ML, and HPC in both the edge and the cloud. Initially, Codeplay will deliver support through the AndesCore performance simulator that provides near cycle accurate information. This will enable customers to implement a software-first strategy and then move to specific SoC architecture based on the NX27V.
Compute-accelerated solutions need a new programming model to leverage all the capabilities of the processing power available. Incorporating one or more vector processor cores, SoC developers and designers can create applications that leverage a Single-Instruction / Multi Data (SIMD) heterogeneous architecture. Artificial Intelligence and Machine Learning applications are required to process a significant amount of vector data for applications like neural networks and computer-vision algorithms seen in cloud acceleration cards, autonomous vehicles and visual recognition. A powerful vector processor like the NX27V can rapidly increase the performance of processing this data.
Coldplay’s Acoran software platform support for NX27V-based simulator and then SoC will provide a wide ecosystem of domain-specific optimized libraries for exascale and artificial intelligence. A key foundation of Acoran is SYCL, an open standard programming model that enables heterogeneous programming based on standard ISO C++.
“The NX27V has been adopted by about 10 customer SoC projects for the datacenter accelerators. All incorporate multiple instances of our vector processor in cluster-based heterogenous architecture,” said Dr. Charlie Su, President and CTO at Andes Technology. “The exciting partnership with Codeplay enables us to bring elegant programming solutions to our customers. We are at the beginning of the next wave SoCs with Domain-Specific Architecture (DSA) for applications ranging from embedded devices to datacenter accelerators that support AI and HPC. The growth potential in this area is enormous.”
“Codeplay is embracing the software-first approach to designing complex compute systems,” said Andrew Richards, CEO and founder of Codeplay Software. “This partnership with Andes will bring developers of RISC-V vector SoCs the opportunity to optimize their architecture based on real application software.”
“Collaboration is at the heart of the RISC-V ecosystem, so it’s great to see members join forces to develop innovative new approaches for the benefit of the entire community,” said Calista Redmond, CEO of RISC-V International. “Together, Andes Technology and Codeplay Software are offering a solution to allow developers and designers to leverage the best of open standards for hardware and software.”
“SYCL has been adopted by organizations building large supercomputers with a variety of GPU architectures. This partnership will help to bring open standard programming to the next generation of specialist processors implementing the RISC-V ISA, which is very exciting for hardware and software developers,” said Michael Wong, Chair of SYCL Working Group within The Khronos Group, Chair of Datacenter / Cloud Computing SIG with RISC-V International, and Distinguished Engineer at Codeplay Software.
Codeplay and Andes welcome companies looking to embrace RVV for accelerating their AI systems to evaluate the solution.

Codeplay_Andes

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes Technology (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. At the end of Q3 2021, the cumulative volume of Andes-Embedded™ SoCs has reached 9 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube! 

About Codeplay Software
Codeplay Software is a world pioneer in enabling acceleration technologies used in AI, HPC and automotive. Codeplay was established in 2002 in Edinburgh, Scotland and developed some of the first tools enabling complex software to be accelerated using graphics processors. Today, most AI software is developed using graphics processors designed for video games, and more recently specialized AI and computer vision accelerators. Codeplay continues to work with global technology leaders to make the latest complex AI systems programmable using open standards based programming languages and allows application developers to quickly bring software to the market. Codeplay is also deeply involved with the definition of open standards, especially OpenCL™, SPIR™, SYCL™, and Vulkan™ through The Khronos Group, and MISRA C++ for automotive.
SYCL, SPIR, Vulkan are trademarks of the Khronos Group Inc. OpenCL and the OpenCL logo are trademarks of Apple Inc. used by permission by Khronos.

For more information, please contact:
Charles Macfarlane
Chief Business Officer
Codeplay Software
charles.macfarlane@codeplay.com
+44 7766 104856

Continue ReadingCodeplay Software partners with Andes Technology to achieve Software First SoC Design for AI-based applications using RISC-V Vector Processors

HPMicro Semiconductor Announces the Release of the HPM6000 Series of Microcontrollers with AndesCore™ Dual D45 Cores

Currently, the HPM6000 series is the world’s most powerful real-time RISC-V microcontrollers, with a clock speed up to 800 MHz, setting a new performance record by over 9000 CoreMark and 4500 DMIPS. Its Abundant Computing Power Accelerates Applications such as Industry 4.0, Smart Home Appliances, Edge Computing, and IoT.

Shanghai, China – December 02, 2021 – HPMicro Semiconductor, a leading manufacturer of high-performance embedded solutions, and Andes Technology, a leading supplier of 32/64-bit RISC-V embedded processors (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), today jointly released the HPM6000 series, the real-time RISC-V microcontrollers with the world’s strongest performance. The flagship product, HPM6750, adopts dual RISC-V AndesCore™ D45 cores, is equipped with innovative bus architecture, efficient level-1 caches and Local Memory, and has set a new performance record of over 9000 CoreMark and 4500 DMIPS, with a main frequency of up to 800 MHz. It provides robust computing power for edge computing and other applications.

The whole series of HPM6000 MCUs, including dual-core HPM6750, single-core HPM6450, and entry-level HPM6120, are all equipped with double-precision floating-point operations and powerful DSP extension instructions, built-in 2 MB SRAM, rich multimedia functions, motor control modules, communication interface and security encryption. The HPM6000 series can be used widely in popular applications such as industry 4.0, smart home appliances, payment terminal, edge computing, and IoT.

The D45 is a member of the AndesCore™ 45 series of Andes Technology RISC-V family. It has in-order 8-stage dual-issue superscalar architecture with optimized load and store pipeline design and advanced branch prediction. Additionally the D45 supports IEEE 754 single/double-precision floating-point unit (FPU) and RISC-V P-extension (DSP/SIMD) instruction. For instruction and data memory subsystem, all 45 series cores come with Local Memory as well as caches, which can greatly enhance the performance of SOCs with large memory such as the HPM6000 series. The D45 core is ideal for real-time applications that demand high performance and fast response time.

“HPMicro’s HPM6000 series are equipped with high-speed computing power and real-time control functions. They offer a more flexible and performance-efficient choice for the high-end MCU market.” Dr. Charlie Su, President and CTO of Andes Technology said, “With the D45 processor and the associated AndeSight™ IDE tools, customers can design software with better performance and streamlined program codes. HPMicro leads the industry by launching outstanding RISC-V embedded MCU security solutions. It shows the excellent R&D capabilities and efficient product development from the HPMicro team.”

“AndesCore™ D45 is the only RISC-V processor IP that can meet the requirements of HPMicro ultra-speed real-time computing. In certain use cases, D45 outperforms its competitors by 50%! In the meantime, Andes technical team’s excellent support is a big reason for us to tape out the HPM6000 series within 8 month of development and achieved one-silicon production. It was a very successful collaboration by our two teams,” said Jintao Zeng, CEO of HPMicro Semiconductor. “HPMicro provides developers with comprehensive developing tools, including HPM Studio, a free IDE based on the VS CODE framework, and a configuration tools with graphics interfaces. HPMicro will also release a BSD-licensed SDK, which includes low-level drivers, middleware and RTOS. All official software will be open-sourced. Our next step is to cooperate with more RISC-V community partners to build a better RISC-V ecosystem.”

Ordering/ Sample Information
HPM6750, HPM6450 series products samples and evaluation boards will be available by the end of December 2021. Please email info@hpmicro.com to order. For more information, please visit www.hpmicro.com

About HPMicro Semiconductor
HPMicro Semiconductor Co., Ltd. was located in Shanghai with wholly-owned subsidiaries in Tianjin and Wuhan. HPMicro’s mission is to build a high-performance general-purpose MCU portfolio that meets the modern-day demand for increased computing power. HPMicroers are a group of people who are very passionate about building world-class MCUs that challenge boundaries, break records, are easy to use, and have a good performance/price balance. HPMicro’s target market is industrial applications, including industrial automation, building control, robotic, motor control, digital power, smart appliance, and smart home.  

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. At the end of Q3 2021, the cumulative volume of Andes-Embedded™ SoCs has reached 9 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube! 

Continue ReadingHPMicro Semiconductor Announces the Release of the HPM6000 Series of Microcontrollers with AndesCore™ Dual D45 Cores

Andes RISC-V Superscalar Multicore A(X)45MP and Vector Processor NX27V Upgrade Their Spec. and Performance

SAN JOSE, CA – December 02, 2021 – Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today announces its superscalar multicore AndesCore 45MP family and the first commercial RISC-V vector processor IP, AndesCore NX27V, upgrade their spec and performance.

The 8-stage superscalar multiprocessor A(X)45MP was announced one year ago. It supports up to four cores and is equipped with DSP, single/double precision FPU (floating-point unit), and Linux-capable Memory Management Unit. Compared with the previous versions, the upgraded 32-bit A45MP and 64-bit AX45MP deliver up to 3x memory bandwidth while raising the floating-point performance by over 20% as measured by Whetstone benchmark. The latency for Level-1 Cache miss and Level-2 Cache hit is reduced by half and it leads to the outstanding 3.4 SPECint2006/GHz performance. In addition, the upgrade also includes RISC-V trace interface and debug spec.

The NX27V, supporting the RISC-V Vector Extension (RVV) spec v1.0-rc1, is upgraded with full configurations of 128-bit to 512-bit VLEN/SIMD/MEM. For vector data types, the NX27V now implements FP16 to FP64 and Int8 to Int64 as well as Andes-enhanced BF16 and Int4 for optimized AI data representations. The NX27V contains a scalar unit and an Out-of-Order Vector Processing Unit (VPU) with a dedicated interface called Streaming Port to efficiently exchange a large amount of data between NX27V registers and an external hardware engine. The NX27V comes with standard development tools and optimized RVV compute libraries. OpenCL™ with integrated LLVM compiler is available to enable parallel programming on heterogeneous architecture using multiple NX27V processors and a host processor such as the AX45MP. With the all 512-bit configuration, the NX27V can achieve over 98x speedup comparing with pure C program and 66% higher performance for MobileNet-v1 benchmark than the all 256-bit configuration. The NX27V targets the applications with large volumes of data such as AI, AR/VR, computer vision, cryptography, and multimedia.

“The 45-series families are welcomed by the market since introduced last year. They are used in diversified applications, ranging from highend MCU, video processing, WiFi 7, 5G base station, AI accelerators, to enterprise-grade storage devices. We are excited that the newly upgraded A(X)45MP with enhanced memory subsystem and optimized FPU can deliver prominent performance to address a wider range of applications. The industrial leading NX27V vector processor just got another award, the EDA & IP Product Award from EE Times (Nov. 16). It has been adopted by nearly 10 customer projects, targeting cloud accelerators with manycore architecture. In this release, NX27V provides a wider range of configurations to cover a variety of performance/area choices,” said Andes President and CTO Dr. Charlie Su. “Together with the complete software development environment and libraries support, A(X)45MP and NX27V are ready to serve more high-performance applications from the edge to the cloud.”

A(X)45MP and NX27V are available for licensing now. Please visit http://www.andestech.com/ for details or contact Andes sales at sales@andestech.com for more information.

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. At the end of Q3 2021, the cumulative volume of Andes-Embedded™ SoCs has reached 9 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube!

Continue ReadingAndes RISC-V Superscalar Multicore A(X)45MP and Vector Processor NX27V Upgrade Their Spec. and Performance

Learn the Latest on RISC-V and Vector Processing at All Five Andes Technology’s Presentations at the 2021 RISC-V Summit

Visit Andes’ Exhibition Hall Display to View Live Demonstrations of its Leading-Edge CPU IP Technology

Hsinchu, Taiwan – November 30, 2021 – Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International will contribute five presentations at the RISC-V Summit from December 6 to 8, 2021. The company will also demonstrate its latest RISC-V IP in a prominent booth in the RISC-V Summit Exhibition Hall.  

Andes President and CTO, Dr. Charlie Su, will deliver the keynote speech “Beefing Up the Datacenter Accelerators” on December 7 at 1:45 PM. On December 8 at 4:00 PM, Dr. Paul Ku, Deputy Technical Director of Architecture Div., will provide IOPMP updates in his presentation “The Protection of IOPMP.”

According to the ResearchAndMarkets report released in September this year, the global market for data center accelerators should grow from $13.5 billion in 2021 to $66.4 billion by 2026, at a compound annual growth rate (CAGR) of 37.6 percent for the period of 2021-2026. Design teams are being challenged to come out a scalable architecture with a limited power budget in a short time window. To address this, Dr. Su will identify the best-in-class, off-the-shelf processor IP for the task. His Keynote will explain how Andes’ RISC-V solutions help designers customize their designs to meet the high-performance goals, tightly couple them with hardwired engines, and integrate the customized processor compilers with their AI model compilers.

Additionally, Toolchain Group Manager, Dr. I-Wei Wu, will introduce “Performance of TVM AutoScheduler for Andes Vector Processor.” Chun-Wei Shu, Software Engineer, will discuss “Bring Multicore RISC-V and Zephyr RTOS Together.” In addition, Academia Sinica in collaboration with National Tsing Hua University, Taiwan and Andes will present “Sail Specification for RISC-V P-Extension.”

For more information, please visit the RISC-V Summit website.

About Andes Technology Corp.
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. To the end of Q3 2021, the cumulative volume of Andes-Embedded™ SoCs has reached 9 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube!

Continue ReadingLearn the Latest on RISC-V and Vector Processing at All Five Andes Technology’s Presentations at the 2021 RISC-V Summit

Kneron Edge AI SoC Powered by Andes RISC-V Processor Core D25F

San Diego, CA, November 4, 2021 – Kneron Inc., the San Diego-based Edge AI solution provider, together with Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high-performance, low-power 32/64-bit RISC-V processor cores, today announced formal mass production of Kneron’s next-generation Edge AI SoC KL530, powered by Andes’ D25F processor in consideration of its efficient pipeline architecture, powerful Packed-SIMD DSP extension instructions, and IEEE754-compliant high-performance single/double precision floating RVFD extensions.

KL530 is the latest generation of heterogeneous AI chip from Kneron, with a brand new NPU architecture. It is the first of its kind in the industry to support INT4 precision and Transformer. Compared with other Edge AI chips, it has higher computing efficiency and lower power consumption. The use of heterogeneous AI chips embedded with RISC-V processors, powerful image processing capabilities and interfaces will further enable the application of Edge AI chips in ADAS, AIoT and other market.

The computing power of KL530 can reach 1 TOPS@INT 4, and the processing efficiency is up to 70% higher than that of INT 8 under the same hardware conditions. Its reconfigurable NPU design takes advantage of the high performance of the D25F RISC-V core, and supports multiple AI models such as CNN, Transformer, RNN Hybrid, etc. Its Smart ISP can optimize image quality based on AI, and powerful codec can achieve high-efficiency multimedia compression. In addition, its cold start time is less than 500ms, and average power consumption is less than 500mW.

The D25F CPU, one of the most popular cores from AndesCore™ 25-series, is equipped with RISC-V P-extension ISA draft to efficiently manipulate multiple data sets simultaneously in one instruction. Andes initiated the P-extension, chairs its Task Group in RISC-V International and leads the specification definition. D25F is accompanied with complete development tools including compiler with auto-generation of SIMD instructions based on vector data type, optimized DSP libraries, neural network libraries, and near cycle-accuracy simulator. It delivers near 9 times speedup for popular machine learning algorithms, including Tensorflow keyword spotting, CIFAR10 image classification, and P-net object detection.

“Kneron has a unique reconfigurable architecture, which can fit easily into different convolutional neural networks (CNN) without compromise, thus serves a wide variety of AI models seamlessly and accurately.” said Albert Liu, Kneron founder and CEO. “The D25F CPU core with its powerful DSP instruction set and development framework enables Kneron to explore the performance of its industry-leading AI algorithms to the fullest while keeping power consumption optimal. It is crucial to our customers, especially for those who develop products such as smart devices and Edge AI appliances. We are happy to cooperate with Andes, the leading computing expert specialized in RISC-V architecture. With Andes RISC-V core and its DSP support, Kneron is able to develop this cutting edge solution smoothly within a very short time frame. We are really proud to see KL530 in mass production now serving our customers.”

“We are glad that Kneron chose the D25F to power KL530, especially after it went through a series of comprehensive evaluations,” said Andes CEO and RISC-V International Board Director Frankwell Lin. “The D25F stands out distinctly in every aspect on key indexes such as product features, performance, core area, and power consumption. As a leading enterprise in providing Edge AI SoC solution embedded with RISC-V core, Kneron showed its efficiency to quickly launch KL530 and enter mass production. It is astonishing to learn the strong competitiveness of Kneron’s team. Thanks to the extraordinary cooperation between Kneron and Andes, we jointly achieved a complete and highly competitive solution to facilitate AI applications for a wide variety of products.”

Kneron KL530 Product Launch

Kneron KL530 online product launch conference will be held at 10:00-11:30 am, November 4th (PDT). GSA CEO Jodi Shelton, Winbond President Pei-Ming Chan, and YouTube Founder Steven Chan are invited to have talks to offer their perspective on the next-generation Edge AI. Registration information https://www.kneron.com/en/event-registration/ab29527e 

About Kneron

Kneron is a San Diego based technology company that was founded in 2015. It develops both hardware and software products, which are used in smart devices to run and power AI applications. Kneron is a single port of call for device manufacturers who want to integrate AI into their products. The products include hardware such as AI chips and software such as AI models, that device manufacturers can use in everything from autonomous cars, all the way down to a smart fridge, doorbell, or any Internet of Things device. Kneron primarily solves three main problems for smart devices running AI — security, energy and cost, thereby enabling AI everywhere and for everyone. Kneron’s solutions are reconfigurable, and will be as efficient at processing image and audio AI models in the future as they are now. It has raised over $100mn to date and is backed by Horizons Ventures, Alibaba, Qualcomm, Sequoia, and more. For further information about Kneron, please visit: http://www.kneron.com/about.php

About Andes Technology

Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. To the end of 2020, the cumulative volume of Andes-Embedded™ SoCs has reached 7 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube!

 

Continue ReadingKneron Edge AI SoC Powered by Andes RISC-V Processor Core D25F