Picocom Embeds 32 Andes N25F RISC-V Cores into Its 5G NR Small Cell Baseband SoC

HSINCHU, TAIWAN –August 4, 2020– Picocom has selected the AndesCore™ N25F RISC-V 32-bit core integrated with the AE350 peripherals platform for its forthcoming 5G small cell distributed unit (DU) System-on-Chip (SoC). Picocom is a 5G open RAN baseband semiconductor company with vast experience in the field of small cells. Its chosen partner, Andes Technology, is a leading supplier of high-performance, low-power compact 32/64-bit RISC-V CPU cores and the Founding Premier member of the RISC-V International Association.

Picocom is championing ‘open RAN’ – the disaggregation of 5G radio access networks (RAN), which will open up the supply chain enabling new vendors to enter the market and compete. With Andes performance efficient cores, Picocom’s DU baseband offload SoC will deliver the needed flexibility, efficiency and performance to meet the challenges brought by 5G small cells.

“Andes N25F 32-bit RISC-V cores are small, yet powerful. Their compact size allows Picocom to use 32 of them, in the form of two clusters, providing flexible processing for data throughputs at line rates up to 25 Gbps for packet header processing,” said Peter Claydon, President, Picocom. “Our engineering team found that using clusters of small RISC-Vs is more efficient than using a small number of larger cores. This clustered RISC-V approach enables us to retain maximum flexibility to cope with future 5G NR standards changes while delivering excellent performance in a very demanding application.”

“The RISC-V core N25F is a proven outstanding solution for high-speed control tasks and floating-point intensive applications. We are delighted that Picocom recognizes the strength of N25F and utilizes dozens of them in clusters, along with the integrated Platform AE350 to design its advanced 5G small cell SoC.” said Dr. Charlie Su, CTO and Executive VP of Andes Technology. “It again validates that Andes’ RISC-V solutions are ideal to tackle the demanding requirements of high-speed protocol control with significant performance for applications such as storage, networking and wireless communication.”

About Picocom

Picocom is a semiconductor company that designs and markets open RAN standard-compliant baseband SoCs and carrier-grade software products for 5G small cell infrastructure. The company, founded in 2018, is headquartered in Hangzhou, China, and has R&D engineering sites in Beijing, China and Bristol, UK. Picocom founding members have significant experience in designing baseband infrastructure products. Picocom is a proud member of the Small Cell Forum, O-RAN Alliance and Telecom Infra Project wireless industry associations. More information about Picocom: http://www.picocom.com.

About Andes Technology

Andes Technology Corporation is a world-class creator of innovative high-performance/low-power 32/64-bit processor cores and associated development environment to serve the rapidly growing global embedded system applications. The company delivers superior low power CPU cores, including the comprehensive RISC-V V5 family of processor IPs, with integrated development environment and associated software/hardware solutions for efficient SoC design. Up to the end of 2019, the cumulative volume of Andes-Embedded™ SoCs has surpassed the 5-billion mark. Andes Technology’s comprehensive CPU line includes extensible entry-level, mid-range and high-end families. For more information, please visit http://www.andestech.com.

Continue ReadingPicocom Embeds 32 Andes N25F RISC-V Cores into Its 5G NR Small Cell Baseband SoC

Andes Technology Takes the Lead in Launching RISC-V Total Solutions and Driving Industry-Academia Collaboration with over 120 Projects

Hsinchu, Taiwan – January 09, 2020 – Andes Technology (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores, has cooperated with more than 70 universities worldwide to date, after signing the first contract of industry-academia cooperation with National Chiao Tung University (NCTU) in 2010. Andes continues to provide CPU IP AndesCore™ licensing, software development tool AndeSight™, and hardware development platforms to schools with licensing series from AndeStar V3 architecture to V5 version RISC-V processors. To promote sustainable development in academia, Andes Technology has actively invested various resources in colleges and universities for many years, including supporting schools with software/hardware equipment and participating establishment of joint laboratories with universities, etc. The total number of contracts with universities around the world is currently over 120. Andes believes in the concept of “technology comes from education” and hence has been working with various academic institutions for several years. It gives back to the academia through providing the most advanced RISC-V computing processor cores, SoC technology, complete training materials, professional teaching programs, practical industry experiences, unique certification exams, and many other technologies and services.

RISC-V draws increasing attention due to its market potential and future development with features such as open-source ISA, which is compact, modular and extensible. Many RISC-V enthusiasts in the industry and academia, whether in the United States, Europe, or Asia, are actively involved in developing an extensive range of RISC-V applications, which leads to a flourishing RISC-V ecosystem. With all 120 contracts, Andes provided the latest RISC-V software development tool, RISC-V ISA, debuggers, examples of project implementation, verification and performance analysis of algorithm to schools. In the course teaching section, National Tsing Hua University is the first one using the RISC-V software development tool AndeSight™ provided by Andes for compiler design courses, and further purchasing the RISC-V development platform Corvette F1 for teaching experimental courses and development of student projects. National Taiwan University’s Computer Science and Information Engineering department has also started to use AndeSight™ for compiler design courses.

In the cooperation of CPU IP Cores licensing, the team led by Wai-Chi Fang,  Professor in Department of Electronics Engineering (EE), NCTU, obtained the license of AndesCore™ V5 RISC-V N25 core computing processor through the cooperation. It is mainly used for security research and development. Currently, it has been successfully taped out at Taiwan Semiconductor Research Institute; Professor Chen-Yi Lee’s team in NCTU adopted Andes RISC-V DSP instruction extension core, to create a face recognition system with artificial intelligence, and published it at 2019 RISC-V Taiwan workshop. “We were surprised that a real-time face recognition system can effectively work with a single RISC-V digital signal processor and DSP-AI program development environment provided by Andes Technology. This means that in many emerging system applications and services, the platform can provide both low-cost and low-power solution, which is a big step forward in developing AIoT ecosystem”, Professor Lee said. Yier Jin, Professor at the University of Florida, US, used AndesCore™ A25 processor core for research projects of IoT platforms and adopted the FPGA platform ADP-XC7K160 for development and verification. Dr. Yier Jin said:” Glad to have the opportunity to use Andes RISC-V A25 processor core in our IoT platform project. IoT data computing is very focused on security and reliability, and A25 meets the needs. We hope to carry on more researches through this platform, especially from the security perspective. “

AI has led a worldwide technology trend. Andes RISC-V instruction set architecture features the flexibility to allow developers to quickly implement many creative designs in the field of AI and IoT. Its high-performance and low-power are the keys to success. At present, in addition to the real-time face detection of Professor Lee’s team from NCTU, the team of Professor Shanq-Jang Ruan from National Taiwan University of Science and Technology has also collaborated with Andes for AI to have deep learning accelerators using Andes Custom Extension™ (ACE) technology. With the ACE instructions, customers can add their own instructions to AndesCore™. Users only need to create an ACE description file and related concise Verilog file to generate CPU with extended instructions and related software toolchain in a few tens of seconds.

Frankwell Lin, President of Andes Technology, said: “Education is the foundation of industrial development. The huge reason why Silicon Valley in the United States has become a center of information technology is that it has close ties with the researchers and talents from industry-academia cooperation with neighboring higher education institutions. Andes Technology has similar advantage in place, located at Hsinchu Science Park, and close to first-class universities. We are also devoted to expanding the range and the number to sign the industry-academia cooperation projects with the world’s top universities. Through the long-term cooperation, we hope to achieve talent cultivation, interact with higher research institutes, and fulfill corporate social responsibilities. Andes Technology will continue to invest human and material resources to support the RISC-V industry-academia cooperation project. “

For more information about Andes RISC-V processors, click http://www.andestech.com/markets.php

About Andes Technology

Andes Technology Corporation is a public listed company with well-established technology and teams to develop innovative high-performance/low-power 32/64-bit processor cores and associated development environment to serve worldwide rapidly growing embedded system applications.

The company delivers the best super low power CPU cores, including the new RISC-V series with integrated development environment and associated software and hardware solutions for efficient SoC design. Up to the end of 2018, the cumulative volume of Andes-Embedded™ SoCs has reached 3.5 billion with 2018 alone contributing over 1 billion.

To meet the demanding requirements of today’s electronic devices, Andes Technology delivers configurable software/hardware IP and scalable platforms to respond to customers’ needs for quality products and faster time-to-market. Andes Technology’s comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications. From 2017, Andes expands its product line to RISC-V processors and provides a total solution in V5 family cores, including N22, N25F/NX25F, D25F, A25/AX25, A25MP/AX25MP, A27/AX27/NX27V,  A45/D45/N45 and AX45/DX45/NX45.

For more information about Andes Technology, please visit

http://www.andestech.com/  

Continue ReadingAndes Technology Takes the Lead in Launching RISC-V Total Solutions and Driving Industry-Academia Collaboration with over 120 Projects

Andes Technology and Deeplite, Inc. Join Forces To Deploy Highly Compact Deep Learning Models Into Daily Life

Hsinchu, Taiwan – December 06, 2019 – Andes Technology, a leading Asia-based supplier of high-performance low-power compact 32/64-bit RISC-V CPU cores and a founding Platinum member of the RISC-V Foundation, and Montreal based AI startup Deeplite, Inc., the creators of Lightweight Intelligence™ making deep learning AI models smaller, faster and more energy efficient, today announced the results of their joint collaboration to deploy highly optimized deep learning models on Andes RISC-V CPU cores based on AndeStar™ V5 architecture . 

The proliferation of smart devices like AI-enabled home assistants in recent years provides an ideal target platform for deploying highly compact deep learning models into daily life. These devices are designed to operate at both low power and low computation resources. To function effectively, a home assistant must be easy to use and respond to user requests in real-time. Today, due to the compute and power requirements of complex AI models, most smart devices must send user data and requests to the cloud to carry out AI processing then returning the results to the smart devices. 

Andes and Deeplite teamed up to enable human-machine interfaces like home assistants, to operate locally with little to no cloud connectivity required. The scenario is an embedded solution where a home assistant “wakes up” when it detects a person via a small camera.  The goal was to optimize a deep learning model running on Andes A25 and D25F that are the first commercial RISC-V cores with DSP SIMD ISA for low-cost edge AI applications.  The team started with a MobileNet model trained on a Visual Wake Words (VWW) dataset that was 13MB in size. Using Deeplite’s hardware-aware optimization engine automatically found, trained and deployed a new model less than 188KB in size and with only a 1% drop in accuracy. 

“We have more and more industry use cases where we see a need for embedded, optimized deep learning models running on our RISC-V cores such as A25 and D25F that have DSP instructions to accelerate deep learning algorithms,” said Dr. Charlie Su, CTO and Executive VP of Andes Technology. “Deeplite has provided a solution that can be leveraged both internally within Andes as well as for our customers to bring deep learning on Andes RISC-V CPU cores to resource-limited devices at the edge.”

“I am thrilled with the results of this collaboration! Not only has Deeplite delivered a 69x industry-changing deep learning optimization with minimal accuracy impact but we have done so by automating formerly manual techniques for neural architecture design that were time-consuming and error prone.” said Nick Romano, CEO of Deeplite, Inc. “What used to take weeks of expensive trial and error is now accomplished automatically in a few hours! Lightweight Intelligence™ by Deeplite and best of breed hardware from Andes are taking us one step closer to enabling AI in the things we use every day.”

By combining industry leading optimization by Deeplite with Andes’ state of the art hardware for use cases like voice recognition or person detection to meet microcontroller-level memory and compute requirements, device OEMs and application developers may offer users the benefit of keeping their data on-device, while still providing the real-time and seamless responses necessary for real-world AI everywhere.

To receive our white paper on this collaboration, please contact Davis Sawyer, cofounder and VP, Product at davis@deeplite.ai.

About Andes Technology

In only 14 years, Andes Technology Corporation is now a world class creator of innovative high-performance/low-power 32/64-bit processor cores and associated development environment to serve the rapidly growing global embedded system applications. Andes is also a founding Platinum member of the RISC-V Foundation and the first mainstream CPU vendor that adopted RISC-V as the base of its fifth-generation architecture, the AndeStar™ V5. In order to meet the demanding requirements of today’s electronic devices, Andes delivers highly configurable and performance-efficient CPU cores with a full-featured integrated development environment and comprehensive software/hardware solutions to help customers innovate their SoC in a shorter time frame. Since 2018, the yearly volume of Andes-Embedded™ SoCs has surpassed the 1-billion mark. Andes Technology’s comprehensive RISC-V CPU families cover from entry-level 32-bit N22, mid-range 32-bit N25F/D25F/A25 and 64-bit NX25F/AX25F, to high-end multicore A(X)25MP.

For more information, please visit https://www.andestech.com 

About Deeplite

Founded in 2018 and based in Montreal, Deeplite is an AI software company dedicated to enabling deep learning in the devices we use every day. Deeplite researches, designs and develops intelligent optimization software powered by reinforcement learning to make Deep Neural Networks (DNNs) faster, smaller and energy-efficient from cloud to edge computing. 

Deeplite has received many industry recognitions including being named a 2019 Canadian Innovation Exchange (CIX) Top20early company and the 2019 Innovation Award Quebec.  Deeplite is currently participating in both the MobilityXlab and L-Spark QNX autonomous vehicle accelerator programs. For more information please visit www.deeplite.ai

Continue ReadingAndes Technology and Deeplite, Inc. Join Forces To Deploy Highly Compact Deep Learning Models Into Daily Life

Andes 45-Series Expands RISC-V High-end Processors 8-Stage Superscalar Processor Balances High Performance, Power Efficiency, and Real-time Determinism with Rich RISC-V Ecosystem

San Jose, California, December 4th, 2019 – Andes Technology Corporation, the world leader in RISC-V CPU solutions, announces AndesCore™ 45-series CPU cores today. It is equipped with efficient superscalar pipeline to address a wide range of high-performance, power-sensitive and real-time embedded systems such as 5G, In-Vehicle Infotainment (IVI), Advanced Driver Assistance Systems (ADAS) and Solid State Disks (SSD).  Availability of the CPU cores to early adopted customers is scheduled from Q1, 2020. 

High-performance embedded systems have come to the fork of the road.  On one hand, customers have enjoyed the ecosystem of industry successful processors.  But they crave the freedom to go beyond the fixed instructions and microarchitecture platforms. The AndesCore 45-series is specifically designed to provide such solution. 

“The 45-series is an important milestone to high-performance space for Andes, this time with the RISC-V instruction set and all the momentum that comes with it,” said Andes President, Frankwell Lin. “Our licensees have asked us to bring our dual-issue processor expertise to the RISC-V cores, and I am glad our R&D team has come through again.”

Initially available in the 45-series will be the 32-bit A45/D45/N45 and 64-bit AX45/DX45/NX45, which benefit from Andes proven 25-series cores, respectively, supporting all of latest RISC-V specifications, subsystem level components, as well as ecosystem enablement from Andes’ 14-years of R&D development. The A-prefix supports Linux and scales up to four cores, N-prefix supports RTOS, while D-prefix supports RISC-V packed SIMD/DSP instructions (P-extension draft).  All 45-series cores employ in-order, 8-stage, dual-issue superscalar with careful memory pipeline designs to incorporate ECC without sacrificing clock speed, and the IEEE754-compliance single and double precision Floating Point Unit (FPU) could be selected.  Indeed, the AX45 core can deliver 1.2GHz at 28nm worst case PVT corner with ECC turned on, making it one of the most robust pipeline designs at this performance level.  The vastly superior pipelining also results in world-class 5.4 Coremark/MHz.  These cores are in-order processors to enhance real-time determinism for code execution.  When coupled with Andes Platform-Level-Interrupt-Controller (PLIC) with priority-based preemption, the 45-series cores are ideal for embedded applications where response times and determinism are critical.

The 45-series cores continue AndesCore™ strong heritage for rich processor subsystem design, starting with memory subsystem with local memory support and configurable instruction & data caches of varying sizes, and associativity.  Advanced branch prediction further improves processor performance with minimal power consumed.  Memory Management Unit (MMU) with configurable table sizes enables the A-prefix 45-series family to run Linux operating systems now fully supported in RISC-V community.  Most importantly, the 45-series family will be released with all of Andes existing RISC-V ecosystem partner solutions already enabled, from security solutions to system level modeling, and hardware debug/trace subsystems.

“While it’s gratifying to bring our years of high-performance processor experience to the 45-series RISC-V product family, it’s the ecosystem, partnership, and market momentum that’s truly exciting.” said Dr. Charlie Su. “A fast processor is nice, but partners and licensees trust us because we have delivered differentiated features, solutions, and enablement supports to help them get to revenue quickly.”

As with Andes 25-series family of processor cores now in production for two years, the 45-series family will support all existing Andes features such as PowerBrake, QuickNap™, WFI for additional power saving; StackSafe™ for stack overflow/underflow protection; CoDense™ for additional code density enhancement beyond RISC-V C-extension; and Andes Custom Extension™ (ACE) for user-defined instructions to realize domain-specific architecture. 

Pricing and Availability:

The 45-series family of cores will be available to early licensees from Q1, 2020.  Please contact Andes Sales at sales@andestech.com for configuration and pricing of the 45-series processors.

About Andes Technology

Fourteen years after starting from scratch, Andes Technology Corporation is now a world class creator of innovative high-performance/low-power 32/64-bit processor cores and associated development environment that serves the rapidly growing global market for embedded system applications. A founding Platinum member of RISC-V Foundation, Andes is the first mainstream CPU vendor that has adopted the RISC-V as the base of its fifth-generation architecture, the AndeStar™ V5. To meet the demanding requirements of today’s electronic devices, Andes delivers highly configurable and performance-efficient CPU cores with full-featured integrated development environment and comprehensive software/hardware solutions to help customers innovate their SoC in a shorter time to market. Since 2018, the yearly volume of SoCs Embedded with Andes CPUs has surpassed the 1-billion mark. Andes Technology’s comprehensive RISC-V CPU families range from the entry-level N22 (32-bit only) and mid-range 25-series, to the newly announced advanced 27-series and 45-series.

For more information, please visit https://www.andestech.com

Continue ReadingAndes 45-Series Expands RISC-V High-end Processors 8-Stage Superscalar Processor Balances High Performance, Power Efficiency, and Real-time Determinism with Rich RISC-V Ecosystem