Andes Technology Announces the Annual ANDES RISC-V CON on June 11th at the DoubleTree San Jose Hotel
- Post author:Ruby Tseng
- Post published:2024-06-07
- Post category:Press Release
RISC-V: Shaping the Future of AI/ML, Application Processors, Automotive, and Security
San Jose, CA — Jun 6, 2024 — Andes Technology (TWSE: 6533), the leading vendor in high-efficiency, low-power 32/64-bit RISC-V processor cores and a Founding Premier member of RISC-V International, unveils its agenda of the annual ANDES RISC-V CON on June 11th at the San Jose Airport DoubleTree Hotel. This year’s theme, “ANDES RISC-V CON: Deep Dive into Automotive/AI/Application Processors and Security Trends,” promises an exhilarating journey into the RISC-V advancements. With over 300 registered attendees, this conference is set to be an industry luminary event, bringing together top-tier experts, researchers, and industry leaders for riveting discussions and groundbreaking insights.
The ANDES RISC-V CON boasts an exceptional lineup of presentations and two dynamic panels featuring key players in the RISC-V ecosystem. The AI panel, moderated by Dylan Patel, Chief Analyst at SemiAnalysis, includes Charlie Cheng from Andes Technology, Chris Walker from Untether AI, Jim Keller from Tenstorrent, and Raja Koduri from Mihira AI. This session will dive deep into “How Open-Source is Transforming AI and Hardware”. Another highlight is the Application Processing panel, moderated by Mark Himelstein, and with panelists consisting of Barna Ibrahim from RISE, Charlie Su from Andes Technology, Lars Bergstrom from Google, and Sandro Pinto from OSYX Technologies. This session will dive deep into how RISC-V eco-system aims at helping RISC-V processor to be used as application processor in a rich OS system, including Android and the others.
The event kicks off at 9:30 AM with a welcome address from Andes Technology’s Chairman and CEO, Frankwell Lin about the RISC-V market outlook, followed with a keynote by Dr. Charlie Su, President & CTO of Andes Technology, titled “Unlocking RISC-V’s Potential in Intelligent Application Processing.” From application processors to AI/ML accelerators, Dr. Su will first give an update on market adoption for RISC-V and show a couple examples of large-scale AI/ML SoCs adopting Andes AI/ML solutions. He will also explore the high-end processor usage scenarios. Marc Evans, Director of Business Development & Marketing at Andes, will discuss Andes’ automotive and security solutions.
The exhibition will display a plethora of exciting RISC-V technologies, including the Andes Qilai testchip, a high-performance SoC with a quad-core RISC-V AX45MP cluster and an NX27V vector processor, designed to accelerate the development and porting of large RISC-V applications. Additionally, there will be an automotive-grade CMOS image sensor demo using the ISO 26262 fully-compliant AndesCore™ N25F-SE by MetaSilicon. Other demos featuring Andes RISC-V cores include the Tinker V, the first RISC-V Single-Board Computer (SBC) from ASUS IoT; an MPU development board from Renesas; an AI development kit with a camera module from Canaan; the IT9836 TDDI demo board from ITE; the PC802SCB 5G small cell reference design from Picocom; and a Bluetooth development kit from Telink.
Additionally, renowned companies like Green Hills, IAR, Lauterbach, Piece Makers, RAIN AI, Siemens EDA, Synopsys (Imperas), and TetraMem will have speeches and booths. Alchip, Arteris, Menta, Rambus, RISE, RISC-V International, S2C, Sapeon, SHD, Signature IP, and Sondrel will have booths to engage and interact with attendees.
ANDES RISC-V CON is the ultimate platform for RISC-V designers and developers to engage in meaningful dialogues with global experts. The conference will offer a stimulating and delightful experience, complete with a delicious lunch buffet and a relaxing evening reception. Stay until the end for a chance to win fabulous prizes including iPad in the Lucky Draw!
Best of all, this incredible event is free to attend! Don’t miss out on this extraordinary opportunity to be part of the RISC-V revolution. Register now and join the event for a day of innovation, inspiration, and networking!
👉 Register here: https://www.andestech.com/Andes_RISC-V_CON_2024_US/
About Andes Technology
Nineteen years in business and a Founding Premier member of RISC-V International, Andes is a publicly-listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit Out-of-Order processors with DSP, FPU, Vector, Linux, superscalar, functional safety and/or multi/many-core capabilities. By the end of 2023, the cumulative volume of Andes-Embedded™ SoCs has surpassed 14 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Bilibili and YouTube! !
Andes Technology Announced the QiLai SoC and the Voyager Development Board
- Post author:Ruby Tseng
- Post published:2024-05-30
- Post category:Press Release
May 30, 2024 – Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today announced the QiLai SoC and the Voyager development board to further accelerate the development and porting of large RISC-V applications.
The QiLai SoC chip includes high performance quad-core RISC-V AX45MP cluster and one NX27V vector processor. The AndesCore™ AX45MP superscalar multicore contains a 2MB Level-2 cache, a coherence manager to manage Level-1 cache coherence, and a MMU (Memory Management Unit) for Linux based applications. The AndesCore™ NX27V vector processor with 512KB data cache supports a full range of RISC-V standard data types and Andes-enhanced data types optimized for AI workloads. The NX27V contains an efficient scalar unit and an out-of-order Vector Processing Unit (VPU) with 512-bit vector length (VLEN) and 512-bit data path width (DLEN), capable of generating up to 4 512-bit results per cycle. The NX27V can cooperate with the AX45MP cluster and make QiLai a heterogeneous software development platform where a Linux SMP system and an RTOS or bare-metal system can run simultaneously. The AX45MP and NX27V can run up to 2.2 GHz and 1.5GHz respectively, and the total power consumption of the QiLai SoC is around 5W when running at its full speed.
The Voyager is a 9.6” x 9.6” Micro ATX form factor development board including a QiLai SoC, 16GB of DDR4 SIMM socket, JTAG debugger, USB to UART bridge, I2S Audio Codec, 16Mb SPI Flash for boot code, SD card socket, and several PCIe Gen4 slots that can bridge to many external devices such as GPU card and SSD. The supporting software includes the OpenSUSE Linux distribution, AndeSight™ toolchains, AndeSoft™ software stacks, and AndesAIRE™ NN SDK to convert AI/ML models to executables running on the NX27V vector processor.
“We are excited to announce the QiLai SoC which integrates our widely-adopted AndesCore™ AX45MP multicore and NX27V vector processor,” said Frankwell Lin, Andes Chairman and CEO. “These two processors have been licensed and silicon-proven by many customers though we are still pleased to see them working on our own silicon in the first cut. Manufactured at TSMC advanced 7nm process technology, the QiLai SoC and the Voyager development board demonstrate our commitment to enable the RISC-V software development in real time. Andes will keep its pure-play IP provider position, not going into chip business, this project is a response to provide better processor IP evaluation and application development purpose, and is an excellent resulting fruit from Andes GDR movement in 2021.”
“Andes has been asked by many partners and software developers for silicon-based platforms, where they can develop software for RISC-V more efficiently,” said Dr. Charlie Su, Andes President and CTO. “The Voyager board with the QiLai SoC is our response to that request and a great step towards enabling fast development and evaluation of a wide range of software for RISC-V, and further helps expand the RISC-V ecosystem.”
About Andes
Nineteen years in business and a Founding Premier member of RISC-V International, Andes is a publicly-listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit Out-of-Order processors with DSP, FPU, Vector, Linux, superscalar, functional safety and/or multi/many-core capabilities. By the end of 2023, the cumulative volume of Andes-Embedded™ SoCs has surpassed 14 billion.
For more information, please visit www.andestech.com or contact info@andestech.com
Discover the Next Wave: 2024 Andes RISC-V CON 東京に参加しよう! | 今すぐAndes RISC-V CON東京会場に無料で登録しよう!
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Andes Technology and MetaSilicon Collaborate to Build the World’s First Automotive-Grade CMOS Image Sensor Product Using RISC-V IP SoC
- Post author:Ruby Tseng
- Post published:2024-02-22
- Post category:Press Release
Feb. 22, 2024 — RISC-V IP vendor Andes Technology and edge computing chip provider MetaSilicon jointly announced that the MetaSilicon MAT Series is the world’s first automotive-grade CMOS image sensor series using RISC-V IP SoC, using Andes’ AndesCore™ N25F-SE processor. They are designed in accordance with the ISO26262 functional safety standard to achieve ASIL-B level and follow the AEC-Q100 Grade 2 to achieve a high level of safety and reliability. And by using technologies such as HDR, advanced imaging can be achieved in a simple, economical, and efficient system. They not only address the effects of high dynamic range, high sensitivity, and high color reproduction, but also meet the application requirements of ADAS decision-making.
The N25F-SE from Andes Technology is a 32-bit RISC-V CPU core that can support the standard IMACFD instruction set, which includes an efficient integer instruction set and a single/double precision floating point operation instruction set. The N25F-SE’s high-efficiency five-stage pipeline achieves a good balance between high operating frequency and a streamlined design. It also has rich configurable options and flexible interface configuration, which greatly simplify the SoC development. In addition, the N25F-SE has obtained the ISO 26262 ASIL-B full compliance certification, which enables the image sensor chip to meet the vehicle-level safety requirement. For the development of MetaSilicon’s automotive-grade chips, the N25F-SE and its safety package provide a good fit CPU solution and together with Andes’ technical support shorten the chip development time significantly.
MetaSilicon has first-class innovative R&D capabilities and has developed several cutting-edge technologies including LOFIC (Lateral Overflow Integration Capacitor) + DCG (Dual Conversion Gain) HDR (High-Dynamic Range), which meet the high-quality image requirements for smart car vision applications. The MAT Series 1MP CMOS image sensor chip has low power consumption and high dynamic range (HDR) characteristics. Its effective image resolution is 1280 H * 960 V, and it can support high dynamic range image output up to 60fps @120dB. The other MAT Series 3MP CIS has multiple capabilities such as low power consumption, ultra-high dynamic range (HDR), on-chip ISP, LFM, etc. Its effective image resolution is 1920 H * 1536 V, and can support up to 60fps frame rate, and the dynamic range can reach the industry-leading 140dB+. These chips can provide reliable high-quality image information for intelligent automotive applications.
“The N25F-SE provides a safety package, which includes a safety manual, safety analysis report and a development interface outline. The N25F-SE and its safety package are effective, high-performance and flexible automotive solutions. They can significantly reduce the time required to design automotive grade SoCs and to comply with the ISO 26262 standard,” said Dr. Charlie Su, President and CTO of Andes Technology. “We are very pleased that N25F-SE’s IP and safety package efficiently support MetaSilicon shorten the development time for its two automotive-grade chips. We also look forward to more cooperation between the two companies in the future to create more innovative products.”
Jianhua Zheng, CTO of MetaSilicon said, “Among the various sensors used in automotive ADAS applications, visual image processing is particularly important. Once the image is not accurate and timely enough, it will directly lead to errors in the judgment of the back-end algorithm, so HDR performance requirements are extremely high. MetaSilicon’s LOFIC+DCG HDR technology can achieve an ultra-high dynamic range of 140dB+ to meet practical application needs in the automotive ADAS field. We are honored to work closely with Andes Technology on two high-performance chips, using the world’s first ISO 26262 certified RISC-V core N25F-SE that meets the functional safety standards. As a result, we can shorten the product development time and achieve functional safety goals.”
About Andes Technology
Eighteen years in business and a Founding Premier member of RISC-V International, Andes is a publicly-listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit Out-of-Order processors with DSP, FPU, Vector, Linux, superscalar, automotive and/or multi/many-core capabilities. By the end of 2023, the cumulative volume of Andes-Embedded™ SoCs has surpassed 14 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Bilibili and YouTube!
About MetaSilicon
MetaSilicon was founded in 2021. Relying on its first-class innovative research and development capabilities and the pursuit of excellence in craftsmanship, it has quickly laid out the dual industry “tracks” of automobiles and mobile phones in just 2 years. MetaSilicon’s automotive products cover electronic rearview mirrors, 360-degree surrounding imaging, advanced driver assistance system (ADAS) and other applications. With the self-developed ultra-low noise and power read-out circuits, and unique MetaHDR high dynamic range technologies, image sensors are featured by low power consumption, high sensitivity, high dynamics, and high frame rate, enabling high-end automotive applications. For more information about MetaSilicon, please refer to the official website http://www.mtsilicon.com/ .