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AE250 AHB-Based Platform

Pre-integrated with N25(F)

General Description

AE250 AHB-based platform pre-integrated with N25(F) CPU with level-one memories, interrupt controller, debug module, AHB Bus Matrix Controller, AHB-to-APB Bridge and a collection of fundamental AHB/APB bus IP components pre-integrated together as a system design. The high-quality and configurable AHB/APB IPs suites a majority embedded systems, and the verified platform serves as a starting point to jump start SoC designs.

 

Block Diagram

Feature Highlight

Bus Controller / Bridge

  • AHB Bus Matrix Controller
  • AHB-to-APB Bridge

AHB Bus Components

  • atcdmac100           DMA Controller (DMAC)

APB Bus Components

  • atcuart100             UART Controller
  • atcspi200              SPI Controller
  • atciic100                I2C Controller (IIC)
  • atcgpio100            GPIO
  • atcpit100               Programmable Interval Timer (PIT)/PWM
  • atcwdt200              Watchdog Timer (WDT)
  • atcrtc100               Real Time Clock (RTC)
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