2018 Andes RISC-V CON

Andes Technology Corporation

Andes Technology Corporation was founded in Hsinchu Science Park, Taiwan in 2005 to develop innovative high-performance/low-power 32/64-bit processor cores and associated development environment to serve worldwide rapidly growing embedded system applications.

The company delivers the best super low power CPU cores, including the emerging RISC-V series with integrated development environment and associated software and hardware solutions for efficient SoC design. Up to the end of 2017, the cumulative amount of SoCs containing Andes’ CPU IP reaches 2.5 billion.

To meet the demanding requirements of today's electronic devices, Andes Technology delivers configurable software/hardware IP and scalable platforms to respond to customers' needs for quality products and faster time-to-market. Andes Technology's comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications. From 2017, Andes expands its product line and provides a total solution for RISC-V in AndeStar™ V5 processor families, including N25/NX25 and upcoming N25F/NX25F and A25/AX25.


GOWIN Semiconductor

Founded in 2014, GOWIN Semiconductor Corp., headquartered with major R&D in China, has the vision to accelerate customer innovation worldwide with our programmable solutions. We focus on optimizing our products and removing barriers for customers using programmable logic devices.

Our commitment to technology and quality enables customers to reduce the total cost of ownership from using FPGA on their production boards. Our offerings include a broad portfolio of programmable logic devices, design software, intellectual property (IP) cores, reference designs, and development kits. We strive to serve customers in the mobile, consumer, industrial, communication, medical, and automotive markets worldwide.

Booth Demo Title:
RISC-V Microcontroller Enabled Digital Photo Frame in GOWIN’S GW2A-18 FPGA

Booth Demo Description:
The demo utilizes GOWIN’s GW2A-18 FPGA with an embedded RISC-V microcontroller to manage and control delivery of pictures from an SD Card to an LCD display. Pictures stored in the SD-Card are read by the RISC-V MCU. They are then scheduled by the RISC-V MCU and sent through the Ethernet port which loops back to another Ethernet. The RISC-V MCU then pipelines data to the LCD panel.


Imperas Software Ltd

Imperas develops and markets state-of-the-art virtual platforms and tools to enable the most comprehensive embedded software development, debug and test solutions available today. The Imperas team has combined advanced simulation algorithms, modeling excellence, and a broad range of tools to produce a system that offers: Fastest Execution Performance, Extensive Library of Accurate Models, and Advanced Development Tools.

Fastest Execution Performance: Imperas leading JIT code-morphing simulation technology allows models of processors, such as the Andex N25, to execute at a peak speed of almost 5,000 Million Instructions per Second (MIPS), and booting multi-core Linux in under 7 seconds, on an average desktop PC (yes, it’s not a misprint).

Extensive Library of Accurate Models: The Imperas OVP model library includes a full range of processors from Andes, RISC-V, ARM, Imagination MIPS, PowerPC, OpenCores, Renesas, Synopsys ARC, Altera Nios II, and Xilinx Microblaze. Example platforms and peripherals are also available that run for example: Linux, Android, Nucleus, μC/OS, FreeRTOS, uClinux, eCos. Models operate with SystemC TLM2 and other standards.

Advanced Development Tools: Powerful verification, analysis and profiling tools plus a multi- core debugger use Tool Morphing™ to merge them into the simulator, to operate with minimal performance degradation or execution alteration. Tools operate from bare metal instructions to CPU- and OS-Aware abstract modes, and can be customized for platform and scenario specific operations. This environment has been used by Imperas customers to find bugs in previously fully tested production code.

Booth Demo Title:
Simulating Andes RISC-V N25 running FreeRTOS and heterogeneous virtual platform running SMP Linux

Booth Demo Description:
Demo shows the Imperas OVP model of the RISC-V Andes N25 core running FreeRTOS in a heterogeneous platform with an Imperas OVP model of quad core booting SMP Linux. RISC-V Processor Developer Suite™ featuring software tools for RISC-V processors.


XtremeEDA Corporation

Founded in 2002, XtremeEDA is a preferred North-American provider of front-end design and verification services for the semiconductor industry.  Our team is unparalleled – providing best value solutions for the semiconductor industry since 2002.

We provide ASIC, SoC, IP and FPGA development, Microarchitecture Specification, Digital Logic Design, Design Implementation, Digital Design Verification, Mixed-Signal Verification, and Low-power Design and Verification. Our areas of expertise include but are not limited to  microprocessor system design and development, PCIe and DDR IP and VIP, disk controller verification, networking IP verification, and more. We are experts in system and module level verification.

Our vertical domain experience includes networking, telecom, wireless, processors, storage, avionics, consumer products and much more. Our “project-based” engagement model is implemented by engineers that average over 20 years’ experience. Our project experience ranges from team augmentation to complete IP or ASIC development from specification to GDSII release.

Our engineering team has deep experience in SystemVerilog, UVM, SVA, Specman e, UPF, C/C++, Perl, Ruby, Python, Primetime, Design Compiler, Quartus, Vivado, WREAL, Real-Numbering Modeling, Spyglass, Conformal, and Verilog-AMS.

We are proud to partner with Andes Technologies as their preferred North American engineering services partner, and we are a member of the RISC-V Foundation.   To inquire about services and pricing contact us at sales@xtreme-eda.com

Booth Demo Title:
XtremeEDA, provider of engineering design and verification services.

Booth Demo Description:
One of our verification engineers, Jeremy Ralph will be presenting on RISC-V SoC Hierarchical Verification – Block to Top Level during the conference’s scheduled speaker line up.  Jeremy is also currently developing riscv-vip, an open-source SystemVerilog project for RISC-V pre-silicon debug and verification. Stop by our booth to talk with Jeremy about this RISC-V open-source project and meet our President, Claude Cloutier to learn more about our services.


Hex Five Security, Inc.

Hex Five Security, Inc. is the creator of MultiZone™ Security, the first trusted execution environment for RISC-V. Hex Five’s patent pending technology provides policy-based hardware-enforced separation for an unlimited number of security domains, with full control over data, code and peripherals. Contrary to traditional solutions, Hex Five MultiZone™ Security requires no additional cores, specialized hardware or changes to existing software. Open source libraries, third party binaries and legacy code can be configured in minutes to achieve unprecedented levels of safety and security.

Booth Demo Title:
MultiZone TM Security – the first Trusted Execution Environment on an Andes N25 Core

Booth Demo Description:
MultiZone TM Security – the first Trusted Execution Environment for RISC-V is shown operating on an Andes N25 core running on a Gowin GA25 FPGA. In this demo, these equally secure zones are configured – one acting as a terminal back to a host PC, one controlling an LED demo and one controlling a robot in realtime. This demo forms the basis of the MultiZone TM Evaluation SDK that will soon be release in conjunction with Andes and Gowin.


INVECAS Inc.

INVECAS operates globally from offices in Santa Clara, California, Burlington, Vermont, Bangalore, New Delhi and Hyderabad, India, and in Shanghai and Shenzhen, China. The INVECAS team has a strong track record in delivering world class semiconductor IPs and its Design and Silicon realization teams have achieved first time silicon success on multiple designs on leading edge processes including 7nm, 14nm and 16nm.

INVECAS brings together an extensive catalog of High performance Analog and Interface IP, Foundation IP, coupled with ASIC design and Embedded Software expertise under one roof to provide complete end-to-end ASIC solutions for customers worldwide. In addition to offering traditional turn key ASIC design services, INVECAS experienced teams can help customers in building prototype boards, pre and post silicon validation and diagnostics and bring up automation. INVECAS has state of the art compliance and testing labs in Hyderabad, Shanghai and Santa Clara.

For more information, visit www.invecas.com


M31

M31 Technology Corporation is a silicon intellectual property (IP) provider. M31 product focuses are silicon-proven high-speed interface IP, such as USB, PCIe, and MIPI PHY, memory compilers, standard cell libraries, ESD, and IO solutions.

M31 emphasizes its strength in R&D and customer services, with it substantial experience of IP development, IC design, and electronic design automation. The company plans to go public at the end of 2018. It is headquartered in Hsinchu, Taiwan.


UltraSoC Technologies Ltd.

UltraSoC provides semiconductor intellectual property and supporting software tools that allow development teams to incorporate intelligent self-analytic capabilities in the systems-on-chip (SoCs) at the heart of today’s computing, communications and consumer electronics products. The company’s embedded analytics technology helps solve the most pressing problems faced by the high-tech industries today – including cybersecurity, functional safety, and the management of complexity. Its solutions also allow designers to develop SoCs – the driving force behind both performance improvement and cost reduction in the electronics business – more quickly and cost-effectively.

The company’s flagship product line is a suite of semiconductor IP that allows chip designers to integrate an intelligent analytics infrastructure into the core hardware of their devices. By monitoring and analyzing the real-world behavior of entire systems, engineers can take action to reduce system power consumption, increase performance, protect against malicious intrusions, and ensure product safety via UltraSoC’s intelligent analytics embedded in the silicon. These capabilities address applications in a broad range of market sectors, from automotive and IoT products, to at-scale computing and communications infrastructure.

As a member of the RISC-V Foundation, UltraSoC is deeply involved in developing and defining the debug architecture for RISC-V standards. The company’s RISC-V development environment encompasses SoC analytics, processor trace and other options. Its processor trace solution – developed in 2017 and offered shortly afterwards for use by the RISC-V Foundation as part of its standardization effort – was the first and remains the only commercial trace solution on the market. The company remains fully committed to supporting the RISC-V Foundation standards for run-control/debug and the proposed processor trace format, in line with its wider strategy of providing integrated debug and development solutions for any processor architecture.

UltraSoC’s products are used by leading names including HiSilicon (Huawei), Intel, Microchip Technologies, Alibaba group company C-SKY, and Kraftway. Licensees have already taped-out devices at 40nm, 28nm, 16nm and 7nm process nodes. The company’s partners include Andes, Arm, Cadence/Tensilica, CEVA, Esperanto, Imperas, Lauterbach, Mentor, MIPS, Moortec, Percepio, Segger, SiFive, Sondrel, and Teledyne LeCroy.

UltraSoC’s technology also has a substantial impact on the increasingly-pressurized economics of the semiconductor industry. Traditional SoC development methodologies have failed to keep pace with escalating systemic complexity, creating a ‘productivity gap’. UltraSoC’s intelligent analytics close that gap, giving development teams actionable insights that shorten the total development cycle time, accelerate debug, and reduce risk and cost to ensure timely market entry. Analysis from SemiCo research demonstrates the bottom-line value of this approach: SoC design teams can double their profitability and reduce their development costs by a quarter by using UltraSoC.

Headquartered in Cambridge, UK, the company’s investors include Indaco Venture Partners, Enso Ventures, Octopus and Oxford Capital. The company was named one of the 100 most exciting companies in the UK in the 2016 Mishcon de Reya / CityAM “Leap 100” list, and by Gartner as one of its 2016 “Cool Vendors”. It was recognized as “Best New Company” at the 2015 ELEKTRA Awards.

More information on UltraSoC can be viewed at: www.ultrasoc.com