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Voyager Development Platform
General Description
The QiLai SoC chip includes high performance quad-core RISC-V AX45MP cluster and one NX27V vector processor. The AndesCore™ AX45MP superscalar multicore contains a 2MB Level-2 cache, a coherence manger to manage Level-1 cache coherence, and a MMU (Memory Management Unit) for Linux based applications. The AndesCore™ NX27V vector processor with 512KB data cache supports a full range of RISC-V standard data types and Andes-enhanced data types optimized for AI workloads. The NX27V contains an efficient scalar unit and an out-of-order Vector Processing Unit (VPU) with 512-bit vector length (VLEN) and 512-bit data path width (DLEN), capable of generating up to 4 512-bit results per cycle. The NX27V can cooperate with the AX45MP cluster and make QiLai a heterogeneous software development platform where a Linux SMP system and an RTOS or bare-metal system can run simultaneously. The AX45MP and NX27V can run up to 2.2 GHz and 1.5GHz respectively, and the total power consumption of the QiLai SoC is around 5W when running at its full speed.
The Voyager is a 9.6” x 9.6” Micro ATX form factor development board including a QiLai SoC, 16GB of DDR4 SIMM socket, JTAG debugger, USB to UART bridge, I2S Audio Codec, 16Mb SPI Flash for boot code, SD card socket, and several PCIe Gen4 slots that can bridge to many external devices such as GPU card and SSD. The supporting software includes the OpenSUSE Linux distribution, AndeSight™ toolchains, AndeSoft™ software stacks, and AndesAIRE™ NN SDK to convert AI/ML models to executables running on the NX27V vector processor.
QiLai SoC Chip Block Diagram
Voyager Development Platform
Voyager Development Platform Features
Feature Highlight
AX45MP-4C Cluster
- RV64GC 8-stage superscalar processor x 4
- Support of MESI cache coherence protocol with Coherence Manager
- 32KB L1 Instruction and Date cache
- 2MB L2 cache
- I/O Coherence Port (IOCP) : Synchronous AXI4 (256 bits data width)
- Bus Interface : 256-bit AXI4 Memory Interface and Memory Mapped I/O (MMIO) Interface & 256-bit AXI-4 I/O Coherence Port (IOCP)
NX27V
- RV64 GCV 64-bit vector processor boasting a streamlined 5-stage scalar pipeline
- 32KiB I-Cache, 512KiB D-Cache
- Bus Interface : 256-bit AXI4
- Vector Instruction Extension : VLEN/SIMD/MEM Width 512/512/512 & ELEN 64
Process Technology
- TSMC 7nm:
Lib for H300 ULVT/LVT/SVT - Frequency (worst/typical):
AX45MP: 1.6 / 2.1 GHz, NX27V: 1.1 / 1.4 GHz