AndesCore™ 32-bit CPU Cores Ideal in Rapidly Developing Networking Market
With the advent of smart device, two networking technologies are poised for significant growth: WiFi and Bluetooth, thanks to the rapid development of proximity engagement solutions. These solutions are being driven by initiatives at Apple and Google: Apple iBeacon and Google Eddystone, both based around Bluetooth, but with WiFi attempting to participate. Proximity engagement solutions bring to life places and objects in the physical world by tagging them with digital content. Small inconspicuous devices—beacons—in places (shopping centers) and objects (retail goods) broadcast the same short message over and over to engage anyone with a smart device. Deployed anywhere, they run for years off a coin cell battery.
According to ComputerWorld, “the beacon market is just getting started. There are on the order of 100,000 beacons in use today. That number could grow rapidly to 50 million. Although many companies have invested money and resources in Bluetooth beacons, it’s not too late for a competing technology (like Wifi) to help drive and ultimately dominate the market.”
WiFi, Bluetooth, and Zigbee Networking all demand low-cost, high performance, and ultra low power consumption. However, they also demand high security. All these requirements are addressed in the AndesCore™ line of 32-bit embedded processors, based on the AndeStar™ Architecture. Developed in the past decade, AndeStar™ enables enormous power savings while providing high performance, and hacker resistant security.
Besides the performance-efficient baseline instruction set, AndeStar’s contribution to high performance is the capability to add custom instructions to accelerate compute intensive tasks in the framework of Andes Custom Extension (ACE). For example, a custom instruction to accelerate a FIR filter can boost performance and reduce power consumption by as much as an order of magnitude. While custom instructions are not new to embedded processors, Andes’ contribution is a powerful tool that greatly eases the task of creating the instruction and incorporating it into the existing software development tools with quick turnaround time. In addition, the ACE logic of the instruction is verified against its semantics automatically in the flow.
To prevent hacking and intrusion, AndeStar added a set of security features to protect against physical tampering and software attacks. These security features include secure interruption protected with hardware memory stacking, instruction/data/address scrambling, side channel attack protection, and fault-injection attack detection. Secure interruption protects the CPU states (including register file and program stack) of secure software from the potential attack via a malicious interrupt service routine (ISR) without compromising the real-time response of harmless cooperative ISRs. Scrambling defends against attacks that target all the interfaces of CPU and memory contents. Power analysis protection guards against hacking the program by observing the power use signature of the CPU. Fault injection attack detection constantly monitors the integrity of critical CPU states for presence of potential threats.
Only the AndesCore™ series of high performance 32-bit CPU cores, designed in the past decade, can deliver the low cost, low power consumption, high performance, and enhanced security demanded by today’s emerging high volume networking applications.