Overview

Andes Technology is a provider of innovative embedded processor and SoC platform IP solutions. With our extensive experience and expertise in SoC design, we offer a complete infrastructure, including software development toolchains, hardware development platforms, and edge and endpoint AI solutions, to help customers achieve efficient outcomes in SoC and system development. Andes’ silicon intellectual property line-up, which mainly consists of 32/64-bit RISC-V processors, also includes a series of software and hardware technologies and products, categorized into AndeStar™, AndesCore™, AndeShape™, AndeSight™, AndeSoft™, and AndesAIRE™. Below is a brief introduction to each:

AndeStar™
AndeStar™ V3 is Andes’ third-generation patented 32-bit RISC architecture, featuring mixed-length 16/32-bit instructions that optimize system performance, code density, and power efficiency. AndeStar™ V5 is the latest generation of Andes CPU architecture, incorporating 32-bit and 64-bit register structures with mixed-length 16/32-bit instructions. By supporting standard instructions compatible with RISC-V technology and combining the performance-enhancing extensions from V3, the AndeStar™ V5 offers compact, modular, and customizable RISC-V architecture for SoC applications.

AndesCore™
AndesCore™ consists of a family of high-performance 32-bit/64-bit CPU cores designed for various market segments in today’s emerging applications. Based on the AndeStar™ V5 instruction set architecture (ISA), AndesCore™ processors are fully compatible with the RISC-V technology. According to the specific needs of different target applications, AndesCore™ processors support several CPU series, including the Compact Series, 25-Series, 27-Series, 40-Series, and 60-Series. The versatility and rich functionality of the AndesCore™ families allow for flexible SoC customization based on application requirements, improving platform performance and reducing system costs.

AndeShape™
The AndeShape™ platform includes Platform IP, ICE Debugger, FPGA-Type Development Platform, and Chip-Type Development Platform for AndesCore™ processor system development. Customers can integrate their own IP into the platform to complete SoC design, thus reducing development risks and shortening development time. In addition to basic connectivity and storage devices, the SoC platform offers extensive hardware options at both the circuit board and SoC levels, facilitating hardware/software development and enabling flexibility in early prototyping.

AndeSight™
AndeSight™ is an Eclipse-based integrated development environment (IDE) that provides an efficient way to develop embedded applications for AndesCore™-based SoCs. Supporting the AndeStar™ architecture and Andes processor design, it includes compilers, program libraries, advanced debugging, performance and coverage analysis, and an easy-to-use integrated software development environment with a graphical interface. AndeSight™ is available in STD and RDS versions. AndeSight™ STD offers an optimized compiler and Linux support; AndeSight™ RDS builds on AndeSight™ STD with additional customization features for customer redistribution purposes.

AndeSoft™
Andes Technology provides a wide range of software components under the name AndeSoft™, including real-time operating systems, Linux kernels and drivers, libraries, middleware, and application frameworks running on AndesCore™ processors. These components help customers accelerate their development processes. Users can leverage these well-prepared and verified building blocks according to their needs, allowing them to focus on their product development and significantly improve time-to-market. AndesCore™ processors offer a variety of configurations, and the corresponding software components, such as operating systems and C/C++ libraries, are optimized according to the hardware configuration. When selecting a processor configuration, Andes provides the corresponding components that best match the associated hardware.

AndesAIRE™
AndesAIRE™ offers highly efficient solutions designed for edge and end-point inference. This includes the first generation of AI/ML hardware accelerator intellectual property (IP)—the AndesAIRE™ AnDLA™ I350 (Andes Deep Learning Accelerator), neural network software tools and runtimes (the AndesAIRE™ NN SDK), and the highly optimized and handcrafted NN compute libraries for RISC-V DSP/SIMD P-Extension (draft) and RISC-V Vector V-Extension v1.0 (AndesAIRE™ NN Library). Additionally, the ACE (Andes Custom Extension™) plays a crucial role in efficient data movement between the CPU and the AnDLA™, significantly reducing memory bandwidth and power consumption while increasing hardware utilization.