2022 RISC-V CON RISC-V The Rising Forc

RISC-V CON Silicon Valley
Date: October 18th, 2022 (Tuesday)
Time: 10:00 AM - 6:00 PM
Venue: DoubleTree by Hilton Hotel San Jose

In order to foster stronger collaboration on RISC-V across the computing industry, RISC-V CON focuses on this disruptive technology, demonstrating its benefits and identifying commercial strategies. Through RISC-V CON, the RISC-V community and ecosystem can share the most up-to-date development and RISC-V based products and solutions.

Seventeen years in business and a Founding Premier member of RISC-V International, Andes Technology is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion since 2021 and continues to rise. In the end of 2021, the cumulative volume of Andes-Embedded™ SoCs has surpassed 10 billion.

By bringing the leading companies in the RISC-V ecosystem together at RISC-V CON, Andes aims to boost RISC-V adoption by collaborating with partners and customers to quickly bring innovative designs based on the open RISC-V ISA to market.



Agenda

Registration

Expanding the RISC-V Horizon

Frankwell Lin

Charlie Su, President & CTO, Andes Technology

It is no secret that RISC-V architecture is growing, its membership is rising, and the RISC-V ecosystem is flourishing. All in an unprecedented speed. In this talk, we will examine an expanding range of applications RISC-V serves and how Andes RISC-V solutions help driving its fast adoptions. We will also look into what are coming on the horizon.

RISC-V in a New Systems Foundry Era

Frankwell Lin

Bob Brennan, Vice President, Intel Foundry Services

Tea Break

Ear Computers - the Foundation of Headphone 3.0

Gary Spittle, Founder & CEO, Sonical

Andes is Driving On

John Min, Director of Solution Engineering, Andes Technology

Andes is expanding RISC-V application space with ASIL Certified Cores. We will introduce industry's first ASIL Certified RISC-V Solution for Automotive Applications.

Lunch

RISC-V Ecosystem Panel: From Edge to Cloud

Moderator: Daniel Nenni, Founder, SemiWiki
Panelist: Andes, Crypto Quantique, Green Hills Software, IAR Systems, Imperas Software

Architectural exploration for RISC-V optimized domain specific processors with Imperas and Andes ACE

Manny Wright, Senior Consulting Engineer, Imperas Software

This talk will outline the architectural exploration process to optimize Andes ACE extensions for your applications using the Imperas reference models and analysis tools.

ENABLING RISC-V FOR AIOT & EDGE

Vijay Krishnan,General Manager, RISC-V Ventures of Intel

In his presentation, Vijay will cover capabilities needed to address AIoT & Edge use cases, and talk about how the recently launched Intel Pathfinder for RISC-V is helping the ecosystem. He will also share a glimpse into the 2023 priorities for his line of business.

Tea Break

Safe and Secure Software Solutions for Andes RISC-V

Max Hinson, Lead Technical Marketing Engineer, Green Hills Software

Green Hills Software and Andes Technology offer combined capabilities for the AndeStar™ V5 Architecture, enabling the efficient development and confident deployment of RISC-V-based designs in systems with critical requirements for functional safety and security. Green Hills’ software offering features real-time operating systems, powerful compilers and advanced C/C++ development tools that draw upon the company’s 40-years of microprocessor experience.

Securing your RISC-V design end to end using Quantum driven technology

Chris Jones, IoT Director of Applications, Crypto Quantique

Cybersecurity is fast becoming the number one concern for the entire supply chain, from designers to consumers. Learn how Crypto Quantique’s Quantum driven unforgeable device ID in silicon (QDID) adds the highest level of security to an Andes RISC-V CPU's internal security features for an Internet of Things chip design.

Unleashing RISC-V Computing Power in AIoT and Domain-Specific Applications

Warren Chen, Senior Technical Manger, Andes Technology

Hardware could not reach its full capabilities without corresponding software solutions. In this talk, we will reveal how software solutions could help to unleash RISC-V computing power. With optimized toolchains, comprehensive IDE, graphical pipeline analyzer and visualizer, and custom extension automation tools, developers can exploit the full performance of the processors. Combined with software solutions, the demand for performance and power efficiency can be fulfilled in AIoT and domain-specific applications.

Q&A

Evening Reception & Lucky Draw

SPEAKER


Charlie Su,
President & CTO, Andes Technology

Chris Jones,
IoT Director of Applications, Crypto Quantique

Warren Chen,
Senior Technical Manager, Andes Technology

John Min,
Director of Solution Engineering, Andes Technology

Bob Brennan,
Vice President, Intel Foundry Services

Vijay Krishnan,
General Manager, RISC-V Ventures of Intel

Daniel Nenni,
Founder, SemiWiki

Manny Wright,
Senior Consulting Engineer, Imperas Software

Gary Spittle,
Founder & CEO, Sonical

Max Hinson,
Lead Technical Marketing Engineer, Green Hills Software

DeWayne Gibson,
Field Application Engineer, IAR Systems

Katherine (Kat) Hsu,
Senior Account Manager, Imperas Software Ltd

Organizer



Partner



Sponsor

PRIZE

Andes-Embedded

Renesas RZ SMARC Board

Nintendo Switch

Razer Hammerhead
True Wireless Pro

JBL Wireless Headphones

Amazon Echo Dot