晶心新聞

Andes Technology USA Corp. Announces Major Expansion of Its U.S. Operation

Company Announces Job Openings for San Jose Headquarters and Portland R&D Office

San Jose, California October 8, 2021 – Andes Technology USA Corp., the headquarters of North America operations of Hsinchu, Taiwan-based Andes Technology Corporation, a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and founding premier member of RISC-V International, today announced a major expansion of Its U.S. operation. Andes Technology USA is greatly increasing engineering headcount in both the San Jose, California headquarters and its Portland, Oregon research and development facility. Andes Technology USA is seeking engineers in the U.S. and Canada to work remotely or in the Portland or San Jose offices. Openings are available for design engineers, verification engineers, and field application engineers.

Andes Technology USA Corp. was established in 2015 as a California corporation coincident with Andes Technology Corp. joining RISC-V International. After Andes took the RISC-V instruction set architecture (ISA) as the base to form its fifth generation architecture, AndeStar™ V5 and started developing V5 processor IP’s, the U.S. operation was formed to be nearby early customer adopters of the new ISA. The U.S. subsidiary established an R&D lab shortly thereafter and began developing architectures for the high-end RISC-V processors. In under a year the investment together with the main engineering team in Taiwan yielded the first commercial RISC-V Vector processor IP which won nearly 10 projects including datacenter projects from a large OEM so far.

“Major semiconductor companies worldwide adopting the RISC-V ISA and the RISC-V International work groups rapid development of the RISC-V ISA extensions is driving demand for engineers to keep up with the fast pace of new technology development,” said Emerson Hsiao, Andes Technology USA Corp. Chief Operating Officer. “RISC-V customers like the growing number of extensions coming available as well as their ability to customize the architecture to better fit their processing requirements. Our tool Andes Custom Extensions (ACE) makes the customization process easier and less risky. To keep up with RISC-V technical developments and to serve our customers’ requests, we expect to greatly expand the size of our U.S. operation.”

Engineers interested in Andes are encouraged to view the open positions on the Andes Technology LinkedIn page.

 

About Andes Technology USA Corp.
Andes Technology USA Corp. was formed as a California corporation in 2015 in San Jose California to develop high-end CPU architectures. Emerson Hsiao, Chief Operating Officer heads the office, located in the heart of Silicon Valley in San Jose. In June 2018, the U.S. operation added its R&D facility in Portland, Oregon to attract engineers in the Pacific Northwest and Canada. To date, the U.S. operation continues to develop new high-end CPU processor architecture. Its most significant achievement is the development of the first RISC-V vector architecture based on the RISC-V International RVV specification. Andes developed the first RISC-V vector architecture based on version V0.8 of the specification and has advanced it to the latest to-be-ratified version.

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation architecture AndeStar™ adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. To the end of 2020, the cumulative volume of Andes-Embedded™ SoCs has surpassed 7 billion.

About RISC-V AndesCore™
Andes Technology’s comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications. From 2017, Andes expands its product line to RISC-V processors and provides a total solution in V5 family cores, including N22, N25F/NX25F, D25F, A25/AX25, A25MP/AX25MP, A27/AX27/NX27V, A45/D45/N45, AX45/DX45/NX45 and A45MP/AX45MP.

For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube!

Contact Information
Andes Technology –  hr@andestech.com

Continue ReadingAndes Technology USA Corp. Announces Major Expansion of Its U.S. Operation

晶心科順利發行海外存託憑證 完成首次於盧森堡發行GDR募資 並發表積極成長計畫

【台灣新竹】─ 2021年10月7日─ RISC-V 中央處理器矽智財供應商晶心科 (6533-TW) 今 (7) 日宣布,已於9月13日順利完成海外存託憑證 (GDR) 發行,於盧森堡證交所掛牌上市,新發行之海外存託憑證每單位表彰普通股 2 股,以31.78美元,折算約為每股新台幣 440 元,共發行 400 萬單位,相當於普通股 800萬股,海外募得之總金額約為1.27億美元(折合為新台幣35.17億元)。晶心科是目前唯一發行GDR募資的RISC-V CPU IP供應商,而響應本次募資之持有者主要為海外機構投資人,以長期持有為投資策略。

晶心科董事長林志明表示,本次募資的最主要目的是充實中長期營運資金,投資研發,健全產品線佈局,加重發展高階技術產品,同時也能使全球投資人能一起分享RISC-V快速成長之市場。本次募得之資金主要將運用於加速擴大產品設計中心規模,除強化現有RISC-V產品的領先外,更將因應市場急需RISC-V高階運算的解決方案,加速研發高價值之高階RISC-V CPU IP,以及整合系統晶片之軟硬體開發平台。台灣及美、加之設計中心計畫於分階段於3-5年內,招募二百位研發人才,投入開發RISC-V 下一世代之產品,以搶佔高價之高階多核CPU IP市場,增加銷售動能,應用領域包括5G、人工智慧/機器學習、HPC、ADAS、車用電子、AR/VR、區塊鏈、雲端運算、資料中心、伺服器、物聯網、MCU、儲存裝置、安防、無線裝置等大量及高速運算之市場。

根據晶心科公布2021年上半年財報資料顯示,2021上半年之較去年同期成長72.6%,其中63%之營收皆來自RISC-V,包括標準IP授權及客製運算業務,而晶心也分別以2019及2020兩年營收總成長率(對比2018)將近100%的成績,連續進入天下2020、2021之「快速成長一百強」榜單。此外,根據Counterpoint Research最新調查報告指出,隨著半導體解決方案中所需之IP技術要求更多元,純IP供應商之市場將以年複合成長率11%的持續擴大,於2025年達到86億美元的市場規模。而RISC-V因其開源優勢、極佳的功耗比、高安全性及低政治風險等因素,在IP授權市場中具有強勁成長之優勢,預計在2025年將於IoT應用、工業應用、車用等三大產業中,成長至分別占28%、12%、10%的市場佔有率,成為應用的關鍵領域,這些都是晶心市場擴大的有利發展因素。

晶心科技總經理暨技術長蘇泓萌博士表示,晶心的產品雖是硬體IP (Intellectual Property 智慧財產授權),但和軟體公司一樣,研發人力就是腦力密集的生產線。晶心成立以來持續投入大量研發資源,專注於處理器IP系列產品的開發,這是支持晶心近年來營收屢創新高的最主要原因。為保持同樣增長動能,晶心將加速招募更多全球人才投入研發,在現有產品基礎上,創造具高價值優勢之高階產品,滿足市場對RISC-V 高階運算產品的需求,以期與市場共同成長。

展望未來十年,越來越多的國際大廠加入RISC-V陣營,擴大RISC-V市場及應用。晶心決心將繼續強化技術領先者的地位,並基於多年協助客戶導入各式產品量產之豐富經驗,於未來RISC-V CPU IP市場,幫助更多RISC-V SoC設計團隊推出產品,以實現高幅度的營收成長及獲利。

RISC-V demandRISC-V in 2025 

 

關於晶心科技
晶心科技股份有限公司於2005年成立於新竹科學園區,2017年於台灣證交所上市(TWSE:6533)。晶心是RISC-V國際協會的創始首席會員,也是第一家採用RISC-V作為其第五代架構AndeStar™基礎的主流CPU供應商。為了滿足當今電子設備的苛刻要求,晶心提供了可配置性高的32/64位高效CPU核心,包含DSP,FPU,Vector,超純量(Superscalar)及多核心系列,可應用於各式SoC與應用場景。晶心並提供功能齊全的整合開發環境和全面的軟/硬體解決方案,可幫助客戶在短時間內創新其SoC設計。在2020年,Andes-Embedded™ SoC的年出貨量突破20億顆,而截至2020年底,嵌入AndesCore™的SoC累積總出貨量已超過70億顆。
更多關於晶心的資訊,請參閱晶心官網https://www.andestech.com。追蹤晶心最新消息:LinkedInFacebookWeiboTwitterBilibili以及YouTube

Continue Reading晶心科順利發行海外存託憑證 完成首次於盧森堡發行GDR募資 並發表積極成長計畫

Menta和晶心科技宣布建立合作關係 使硬體擴充指令集架構可重新配置

【法國蘇菲亞科學園區】─2021年9月23日─ eFPGA(嵌入式FPGA)解決方案的領導供應商Menta S.A.S與32/64位元RISC-V嵌入式處理器核心領導供應商暨RISC-V國際協會(RISC-V International)創始首席會員晶心科技於今日宣布IP的技術合作。

晶心科技與Menta合作讓晶心RISC-V AndesCore™系列可透過eFPGA達到嵌入式可程式邏輯控制(embedded programmable logic)。Menta和晶心科技的合作將能為客戶提供聯合解決方案,以在製造後的SoC裡新增客製化擴展指令,為目標應用達到倍數的加速效果。

下一代處理器最主要的差異化因素是能夠自定義擴充的指令。RISC-V AndesCore™全面支持在RTL階段擴充指令,而和eFPGA搭配使用則可在SoC製造後,再根據最終應用擴充指令。設計人員可以在RISC-V規範規格下,為想要加速的應用程序增加所需的任何指令。如此強大的功能既不會破壞任何軟體的兼容性,還能為開發和差異化保留發展空間。

「Menta很榮幸能與晶心科技建立密切的合作關係,」Menta執行長Vincent Markus表示。「創新的RISC-V指令集架構(ISA)技術擁有開源、精簡、模組化和可擴展的設計,非常適合Menta eFPGA產品線的策略。」

eFPGA的角色是RISC-V CPU硬體擴充核心的一部份,它開啟了產品在生命週期內,增加或重新配置指令集架構(ISA)的可能性。晶心RISC-V處理器系列已在SoC市場成為主流的計算引擎,現在透過支援eFPGA硬體的擴展,增強客製化產品ACE (Andes Custom Extension™)的功能。

ACE是一個能在晶心RISC-V處理器核心上定義新指令的強大架構。透過ACE的簡易腳本程式來描述指令的輸入輸出和功能,以及使用ACE的精簡Verilog來定義指令在RTL層級的實現方式。SoC設計人員可以輕鬆運用晶心自定義指令的開發工具COPILOT(Custom-OPtimized Instruction deveLOpment Tools),根據上述的設計資料,自動生成擴展晶心處理器所需的所有新組件,包括處理器的RTL、編譯工具、調試器、整合開發環境和近精確週期(near cycle-accurate)的模擬器,以支援客製化新指令並實現加速特定領域的應用。

「透過與Menta的合作,晶心科技能為市場帶來全新的CPU核心的應用方式,將更加支援RISC-V生態系的可擴展性,尤其是在強烈需要建立差異化的應用中,例如人工智慧以及 5G,」晶心科技總經理暨技術長蘇泓萌博士表示。「客戶可以在晶片製造完成後,通過使用Menta eFPGA的解決方案,重新配置ACE的自定義指令,從而在預期成本內最佳化並強化他們的硬體。」

Menta的預編程式eFPGA核心與晶心RISC-V CPU核心相結合,將提供專門的使用者界面及工具,可以在完整和最佳化的軟體解決方案中,對eFPGA矩陣進行設定,並設定RISC-V應用中可編程的參數。

關於晶心科技
晶心科技股份有限公司於2005年成立於新竹科學園區,2017年於台灣證交所上市(TWSE:6533)。晶心是RISC-V國際協會的創始首席會員,也是第一家採用RISC-V作為其第五代架構AndeStar™基礎的主流CPU供應商。為了滿足當今電子設備的苛刻要求,晶心提供了可配置性高的32/64位高效CPU核心,包含DSP,FPU,Vector,超純量(Superscalar)及多核心系列,可應用於各式SoC與應用場景。晶心並提供功能齊全的整合開發環境和全面的軟/硬體解決方案,可幫助客戶在短時間內創新其SoC設計。在2020年,Andes-Embedded™ SoC的年出貨量突破20億顆,而截至2020年底,嵌入AndesCore™的SoC累積總出貨量已超過70億顆。
更多關於晶心的資訊,請參閱晶心官網https://www.andestech.com。追蹤晶心最新消息:LinkedInFacebookWeiboTwitterBilibili以及YouTube

關於Menta
Menta是一家位於法國蘇菲亞科學園區的私人控股公司。對於講求效率、希望產品在第一次設計就正確及可快速投入量產的ASIC和SoC設計人員而言,Menta是經過驗證的eFPGA領導供應商,其設計能適應標準的單元架構(cell-based architecture)加上最先進的工具集,可以為SoC設計帶來最高等級的客製化、高標準的測試性和最快的量產時間,並且應用於所有代工廠的任一製程。更多有關Menta的資訊,請至公司網站:www.menta-efpga.com

Continue ReadingMenta和晶心科技宣布建立合作關係 使硬體擴充指令集架構可重新配置

Andes Technology Corp. Brings Its Broad Family of RISC-V CPU IP to the Silicon Catalyst Semiconductor Incubator

Hsinchu, Taiwan and Silicon Valley, CA – September 8, 2021  Andes Technology Corporation (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today announced that it has joined Silicon Catalyst’s In-Kind Partner program. Andes Technology will make available a wide range of its RISC-V processors to startups participating in the Silicon Catalyst incubator program.

These include all Andes RISC-V offerings between the smallest N22 to its multicore 5-stage pipeline 25 and 27 families with P extension, floating point, L2 cache controller and memory management unit. Incubator startups will also have access to Andes’ AE250 Pre-integrated AHB platform, AE350 Pre-integrated AXI platform, and AndeSight Eclipse-based Integrated Development Environment.

“Andes has been helping a steady stream of new design starts to incorporate our wide range of RISC-V AndesCore™ processors,” said Dr. Charlie Su, President and CTO of Andes Technology. “Silicon start-ups such as those in the Silicon Catalyst incubator program are ideal examples of the new ventures. Many have great products on papers but need the IP and tools to lift their design from the page and implement it in silicon. The Silicon Catalyst incubator and Andes provide them the perfect environment and high efficiency RISC-V CPU IPs to achieve this goal. We are delighted to be part of this endeavor.”

“We applaud Andes’ initiative in expanding the reach and visibility of the RISC-V ISA,” said Calista Redmond, CEO of RISC-V International. “As an open computing platform, the continued growth and adoption of RISC-V depends on a broad ecosystem of hardware and software tools and IP. Andes contributing its silicon-proven RISC-V IP to the Silicon Catalyst incubator will help make it easier for emerging startups to build the next generation of semiconductor applications with RISC-V.”

The mission of Silicon Catalyst is to lower the capital expenses associated with the design and fabrication of silicon-based IC’s, sensors, and MEMS devices. For over seven years, the Silicon Catalyst partner ecosystem has enabled early-stage companies to build complex silicon chips at a fraction of the typical cost. Silicon Catalyst has created a unique ecosystem to provide critical support to semiconductor hardware start-ups, including tools and services from a comprehensive network of In-Kind Partners (IKPs). The Portfolio Companies in the incubator utilize IKP tools and services including design tools, simulation software, design services, foundry PDK access and MPW runs, test program development, tester access, and banking and legal services. Additionally, the startups can tap into the world-class Silicon Catalyst network of advisors and investors.

“Adding a tier one RISC-V IP supplier such as Andes Technology; with its broad range of IP, hardware design tools, and integrated software development environment; broadens the selection of design IP and tools our incubator companies have to create with,” said Paul Pickering, Managing Partner at Silicon Catalyst. “Andes’ success with startups in the emerging 5G and AI chip markets demonstrates their understanding of nurturing new ventures building products for markets that are just beginning to field large numbers of new silicon designs. We are pleased to have them join the Silicon Catalyst incubator and look forward to seeing new designs containing their IP.”

About  Silicon Catalyst
It’s About What’s Next® – Silicon Catalyst is the world’s only incubator focused exclusively on accelerating solutions in silicon (including IP, MEMS & sensors), building a coalition of in-kind and strategic partners to dramatically reduce the cost and complexity of development. More than 400 startup companies have engaged with Silicon Catalyst since April 2015, with a total of 38 startup and early-stage companies admitted to the incubator. With a world-class network of mentors to advise startups, Silicon Catalyst is helping new semiconductor companies address the challenges in moving from idea to realization. The incubator/accelerator supplies startups with a path to design tools, silicon devices, networking, access to funding, banking and marketing acumen to successfully launch and grow their companies’ novel technology solutions. The Silicon Catalyst Angels was established in July 2019 as a separate organization to provide access to seed and Series A funding for Silicon Catalyst portfolio companies.

More information is available at www.siliconcatalyst.com and www.siliconcatalystangels.com

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation architecture AndeStar™ adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. To the end of 2020, the cumulative volume of Andes-Embedded™ SoCs has surpassed 7 billion.

For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube!

About RISC-V AndesCore™
Andes Technology’s comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications. From 2017, Andes expands its product line to RISC-V processors and provides a total solution in V5 family cores, including N22, N25F/NX25F, D25F, A25/AX25, A25MP/AX25MP, A27/AX27/NX27V, A45/D45/N45, AX45/DX45/NX45 and A45MP/AX45MP.

For more information about Andes Technology products, please visit http://www.andestech.com/

Contact Information
Andes Technology – Jonah McLeod , jonahm@andestech.com

Silicon Catalyst – Richard Curtin, richard@siliconcatalyst.com

Continue ReadingAndes Technology Corp. Brings Its Broad Family of RISC-V CPU IP to the Silicon Catalyst Semiconductor Incubator

Imperas模擬器支援Andes Custom Extension™ 加速特定領域應用軟體開發

【台灣新竹、英國牛津】 2021年8月31日─ 32及64位元高效能、可擴展RISC-V CPU處理器核心領導供應商、RISC-V國際協會(RISC-V International)創始首席會員晶心科技(TWSE: 6533) 和高效能軟體模擬和虛擬平台的領導供應商Imperas Software Ltd.於今日宣布將合作範圍拓展到整合開發多功能的Andes Custom Extension™ (ACE)和Imperas高速模擬器。此合作將使SoC設計團隊能夠利用ACE架構來共同設計新指令硬體和相關軟體,在晶片生產之前便可以開始完整的軟體開發。

在ACE的架構下,SoC設計者可以輕鬆且有效率地在Andes RISC-V處理器核心上定義新指令來加速目標應用程式,即透過ACE的簡易腳本程式來描述指令的輸入輸出和功能,及使用ACE的精簡Verilog來定義指令在RTL層級的實現方式。根據上述的設計資料,功能強大的COPILOT(Custom-OPtimized Instruction deveLOpment Tools)工具可以自動生成擴展晶心處理器所需的所有新組件,包括處理器的RTL、編譯工具、調試器、整合開發環境和近精確週期 (near cycle-accurate)的模擬器,以支援客製化的新指令。

當SoC架構師和邏輯設計人員著眼於加速他們的應用最花時間的部分,軟體工程師則需要在增加新功能的同時,確保整個軟體堆疊的功能性和穩健性。在SoC晶片完成設計生產並可用於全面開發之前,快速功能模擬器能讓軟體工程師開始撰寫應用程式、除錯和測試,而不需要受限於硬體開發的時程。藉由連結COPILOT產生的擴展模擬程式庫,Imperas模擬器能如同手動撰寫的模擬器一般,自動辨識新指令並模擬其功能。利用快速模擬器和相關工具,軟體工程師除了可以進行全面開發,更可以提供回饋意見給硬體設計人員。

「晶心所有的RISC-V CPU 核心都是可以擴展的。ACE讓SoC設計人員在不需要CPU設計的能力之下,就能在我們高效能的CPU核心上就能輕鬆的新增客製化指令,來實現特定應用領域的加速,並提升SoC性能至新的水平,」晶心科技總經理暨技術長蘇泓萌博士表示。「Imperas模擬器已經能夠支援晶心的RISC-V CPU核心。我們很高興能夠拓展合作範疇,使ACE用戶透過使用Imperas的快速模擬器,讓軟體工程師也可以從早期階段就參與整個開發過程。」

「RISC-V提供了客製化擴展指令集的靈活性,在符合軟體生態系統的同時,提供了系統架構工程師新的自由發展空間。」Imperas Software Ltd.執行長Simon Davidmann表示。「利用虛擬平台所建構的快速軟體架構增強ACE設計指令的解決方案。所共同產生的平台可在晶片生產完成前,就提供了虛擬開發板。晶心和Imperas的合作旨在幫助客戶和合作夥伴,以軟體開發的速度來創新硬體靈活性。」

本次合作在ACE的解決方案中增加快速模擬器及虛擬平台的功能,SoC設計團隊可利用晶心RISC-V核心處理器的ACE架構來新增客製化指令,並使用COPILOT工具立即自動生成所有必要組件。這些擴展組件包括處理器RTL、編譯工具、調試器、近精確週期模擬器以及Imperas的快速功能模擬器。

關於晶心科技
晶心科技股份有限公司於2005年成立於新竹科學園區,2017年於台灣證交所上市(TWSE:6533)。晶心是RISC-V國際協會的創始首席會員,也是第一家採用RISC-V作為其第五代架構AndeStar™基礎的主流CPU供應商。為了滿足當今電子設備的苛刻要求,晶心提供了可配置性高的32/64位高效CPU核心,包含DSP,FPU,Vector,超純量(Superscalar)及多核心系列,可應用於各式SoC與應用場景。晶心並提供功能齊全的整合開發環境和全面的軟/硬體解決方案,可幫助客戶在短時間內創新其SoC設計。在2020年,Andes-Embedded™ SoC的年出貨量突破20億顆,而截至2020年底,嵌入AndesCore™的SoC累積總出貨量已超過70億顆。更多關於晶心的資訊,請參閱晶心官網 https://www.andestech.com,或追蹤晶心FacebookLinkedInTwitterYouTubeWeibo以及Bilibili。 

關於Imperas 
Imperas 致力於嵌入式軟體和系統的開發,並且是RISC-V處理器模型和虛擬原型解決方案的領導供應商。Imperas和開放虛擬平台(OVP)推進了開源模型,包含一系列處理器、IP供應商、CPU架構、系統IP及處理器和系統的參考平台模型,參考平台模型的部分從簡單的單核裸機(bare metal)平台到啟動 SMP Linux 的全異構多核系統。所有支援模型都可從Imperas網站www.imperas.com和開放虛擬平台(OVP)網站 www.ovpworld.org取得。

Continue ReadingImperas模擬器支援Andes Custom Extension™ 加速特定領域應用軟體開發

Andes Technology And Cyberon Collaborate To Provide Edge-Computing Voice Recognition Solution On DSP-Capable RISC-V Processors

Press highlights:

  • Cyberon DSpotter, the voice wake-up and local command recognition solution, supports Andes RISC-V CPU families
  •  The local and offline command recognition provides users with a quick-response voice operation interface, protects personal privacy, and also reduces the development and maintenance costs of the device manufacturers.
  •  AndesCore™ D25F with DSP/SIMD P-extension instructions boosts the computing performance and efficiency for voice processing to provide competitive voice recognition and voice assistant solutions on edge devices

HSINCHU, TAIWAN – August 19, 2021 – Cyberon Corporation, a leading embedded speech solution provider, and Andes Technology (TWSE: 6533), a major supplier for high efficiency, low-power 32/64-bit RISC-V processor cores, announced their collaboration on the edge-computing voice recognition solution, Cyberon DSpotter, by exploring Andes DSP-capable RISC-V CPU cores such as the popular D25F and comprehensive software development environment to provide a cost-effective, high performance, and easy-to-deploy solution.

The development of AI technology has recently brought tremendous progress in speech recognition. In addition to voice assistant services based on cloud-computing architecture, there are growing demands for local voice recognition by edge-computing devices from the market. Locally executed offline command recognition provides users with a quick-response voice operation interface, protects personal privacy, and reduces the development and maintenance costs of the device manufacturers.

For many products that have a strong demand for voice control, such as wearable devices, home appliances, IoT devices, etc., low computing resource requirements and high recognition performance are important considerations. Therefore, Cyberon based on more than 20 years of professional experience, introduces its new generation algorithm, DSpotter, for voice wake-up and local command recognition.

Different from most solutions in the market, Cyberon’s DSpotter adopts phoneme-based acoustic model to improve customers’ product development efficiency. Developers do not need to collect a large amount of training corpus in advance. They can create the required commands by simply entering text. Based on the relevant foundation built over the past years, Cyberon has developed more than 40 global languages for DSpotter. It helps customers to introduce their products to the global market in a timely manner. Regarding the recognition performance, DSpotter has high accuracy and high noise robustness due to the strength of its acoustic model consisting of TDNN-F architecture. In addition, the algorithm has been well optimized by Cyberon to fit into general MCU platforms without using a dedicated neural network processor. In this way, manufacturers can provide products with voice interfaces through cost-effective hardware.

Furthermore, the performance of DSpotter is increased significantly by leveraging RISC-V DSP/SIMD P-extension (RVP) instructions on AndesCore™ D25F, a 32-bit RISC-V CPU core with highly optimized 5-stage pipeline. The RVP enables multiple data in integer registers to be processed in one single cycle, thus efficiently boosts the computations for voice, audio, image and signal processing. It also greatly improves performance for edge AI involving the above data types. The D25F is the first market-proven RISC-V RVP-capable processor, and has the most complete ecosystem in development tools, libraries for DSP and neural networks, and audio/voice codec.

“The AI technology of edge computing has gradually entered people’s lives,” said Alex Liou, VP of Cyberon Embedded solution BU. “Cyberon’s DSpotter algorithm helps developers to reduce development costs of voice recognition applications. We offer a convenient and easy-to-use tool to create customized commands of global languages. Developers can create various voice recognition applications efficiently to meet the strong and diverse demands of the market. The collaboration with Andes extends the application of DSpotter technology to RISC-V platforms and demonstrates excellent computing and recognition performances. It is hoped that it will bring more products with intelligent and convenient voice interface to people’s lives.”

”Intelligence is now in everyone’s daily life empowering not only by cloud computing but also by edge computing,” said Simon Wang, Technical Marketing Manager of Andes Technology, and in charge of RISC-V compute acceleration ecosystem. “Andes offers a comprehensive 32 and 64 bit RISC-V processor core series with high computation efficiency and low power consumption for general computing solutions. In addition, we provide AI solutions based on RVP, RVV and ACE instruction extensions with the support of Andes NN SDK and have been cooperating with partners to extend our solutions. We are excited to work with Cyberon to offer very competitive voice recognition and voice assistant solutions for edge devices based on the strength of AndesCore™ D25F, esp. its RVP support.”

About Cyberon Corporation
Cyberon Corporation, with its headquarter in New Taipei City, Taiwan, is a leading speech solution provider. Established in 2000, Cyberon has rich experiences in speech algorithm and application development. Its speech recognition and text-to-speech technologies have been widely adopted by IOT devices, home appliances, wearable devices, smart toys, automotive equipment, and enterprise customers. Cyberon provides a full range of voice solutions for embedded MCU/DSP, OS platforms, and server-based services, and is committed to providing users with natural and convenient human-machine voice interfaces. For more information, please visit http://www.cyberon.com.tw

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. To the end of 2020, the cumulative volume of Andes-Embedded™ SoCs has reached 7 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube

Continue ReadingAndes Technology And Cyberon Collaborate To Provide Edge-Computing Voice Recognition Solution On DSP-Capable RISC-V Processors

IAR Systems extends development tools performance capabilities for Andes RISC-V cores

Latest version of IAR Embedded Workbench for RISC-V adds support for latest Andes RISC-V processor technology, including AndeStar™ V5 RISC-V Performance Extension

Uppsala, Sweden—June 23, 2021— IAR Systems®, the future-proof supplier of software tools and services for embedded development, presented a new version of its professional development tools for RISC-V. With the latest release, the complete development toolchain IAR Embedded Workbench® for RISC-V adds support for latest Andes RISC-V extension and devices, enabling maximized performance in RISC-V-based applications.

Through its excellent optimization technology, IAR Embedded Workbench for RISC-V helps developers ensure the application fits the required needs and optimize the utilization of on-board memory. With the support of the AndeStar™ V5 RISC-V Performance Extension, developers can use IAR Embedded Workbench to create applications with increased performance and reduced code size. The toolchain supports all Andes 32-bit V5 RISC-V cores, including the N22, N25F, D25F, A25, A27, N45, D45 and A45. The RISC-V Packed SIMD/DSP extension specification (RVP draft) and the corresponding intrinsic functions as well as Andes DSP libraries are supported.

“AndeStar V5 RISC-V architecture brings the unique and competitive value to our RISC-V customers,” said Dr. Charlie Su, Andes Technology President and CTO. “V5 offers full compatibility to the compact, modular and extensible RISC-V technology by supporting its standard instructions. In addition, it incorporates Andes-extended features already proven in 7+ billion AndeStar V3 processors, such as Performance extension and CoDense™ extension, to applications from edge to cloud. We welcome that IAR Systems provides full support to V5 processors and brings the benefits of IAR Embedded Workbench to the RISC-V community.”

IAR Embedded Workbench for RISC-V is a complete C/C++ compiler and debugger toolchain with everything embedded developers need integrated in one single IDE. To ensure code quality, the toolchain includes C-STAT® for static code analysis. C-STAT proves code alignment with industry standards like MISRA C:2012, MISRA C++:2008 and MISRA C:2004, and also detects defects, bugs, and security vulnerabilities as defined by CERT C and the Common Weakness Enumeration (CWE). For companies working with safety-critical applications, IAR Embedded Workbench for RISC-V is available in a functional safety edition certified by TÜV SÜD according to IEC 61508, ISO 26262, IEC 62304, EN 50128, EN 50657, IEC 60730, ISO 13849, IEC 62061, IEC 61511 and ISO 25119, delivering qualified tools, simplified validation and guaranteed support through the product life cycle.

More information about IAR Systems’ offering for RISC-V is available at www.iar.com/riscv.

IAR Systems Contacts
AnnaMaria Tahlén, Media Relations & Content Manager, IAR Systems
Tel: +46 18 16 78 00 Email: annamaria.tahlen@iar.com
Tora Fridholm, Chief Marketing Officer, IAR Systems
Tel: +46 18 16 78 00 Email: tora.fridholm@iar.com

About IAR Systems
IAR Systems supplies future-proof software tools and services for embedded development, enabling companies worldwide to create the products of today and the innovations of tomorrow. Since 1983, IAR Systems’ solutions have ensured quality, reliability and efficiency in the development of over one million embedded applications. The company is headquartered in Uppsala, Sweden and has sales and support offices all over the world. Since 2018, Secure Thingz, the global domain expert in device security, embedded systems, and lifecycle management, is part of IAR Systems Group AB. IAR Systems Group AB is listed on NASDAQ OMX Stockholm, Mid Cap. Learn more at www.iar.com.

#IAR Systems, #IAR Embedded Workbench, #Embedded Trust,#C-Trust,#C-SPY, #C-RUN, #C-STAT, #IAR Visual State, #IAR KickStart Kit, #I-jet, #I-jet Trace, #I-scope, #IAR Academy

Continue ReadingIAR Systems extends development tools performance capabilities for Andes RISC-V cores

熵碼科技與晶心科技合作將安全處理器PUFiot導入RISC-V AIoT安全平台

台灣新竹】─2021年6月2日─ 致力於PUF (Physical Unclonable Function)安全解决方案矽智財的熵碼科技與RISC-V矽智財領導廠商晶心科技(TWSE:6533),率先將力旺電子(TWSE:3529)與熵碼科技共同開發的純硬體安全處理器PUFiot,導入晶心科技具數位信號處理能力的D25F CPU及其應用平台AE350,並成為晶心科技AndeSentry™安全框架的一部分,為RISC-V晶片生態鏈帶來更完整的安全解決方案。

晶心科技的AndeSentry™開放性的安全合作框架彙集多種安全解决方案,其中PUFiot扮演安全協同處理器角色來執行應用所需安全功能,例如安全信任根、抗攻擊與防複製的安全存儲、隨機數產生器、符合美國NIST高安全標準的對稱/非對稱演算法與密鑰生成/管理機制、簽章認證與資料加解密功能,結合晶心科技的D25F+AE350平台,實現安全啟動、韌體保護、線上更新等更高安全性的系統級安全部署。

熵碼科技所開發之硬體安全處理器PUFiot,結合母公司力旺電子所研發的新一代矽智財Quantum-Tunneling PUF (NeoPUF 晶片指紋),與業界首屈一指的Anti-fuse NeoFuse OTP(One-time Programmable Function)存儲技術,提供晶片識別信任根基礎與穩固的安全邊界,並支持各種國際標準算法,包含對稱、非對稱、雜湊算法與SM2/SM3/SM4,提供彈性化的配備與客製空間。

PUFiot具備多項物理/數位抗攻擊設計,能進一步抵抗旁路攻擊(Side-Channel-Attack)與晶片防複製 (anti-cloning)。對於侵入式攻擊,比方對晶片做聚焦離子束(Focused Ion Beam, FIB ),也有良好的防禦效果。

利用晶片指紋產生密鑰對(Key pairs)與原生ID (Identity), 可降低實現零接觸部署(Zero Touch Deployment)的成本來滿足AI/IoT/5G數以兆計連網裝置的安全部署。協助雲端應用生態,達成零信任(Zero Trust)的安全運作。

晶心科技的RISC-V D25F CPU是32-bit 高效能CPU核心,支持單/雙精度浮點運算以及 RVP P-extension (DSP/SIMD)延伸指令; 而AE350應用平台具AHB/AXI匯流接口、中斷控制、除錯模組以及常用的周邊元件如GPIO、I2C、PWM、QSPI、UART和WatchDog Timer等,能讓客戶設計SoC更為容易。D25F搭配AE350已授權給眾多客戶並廣泛運用在不同的領域。

此次晶心科技和熵碼科技在安全矽智財的合作上別具意義,將為RISC-V架構下的晶片生態系統提供極具成本優勢的硬體安全解決方案。

關於熵碼科技
熵碼科技是致力於利用物理不可複製功能(PUF)發展創新安全解決方案的IP設計公司,為力旺電子之子公司。利基於熵碼與力旺團隊的技術敏銳度和研發成就,包括力旺電子的NeoPUF和NeoFuse OTP等核心IP,熵碼科技將為市場帶來新穎的PUF-based安全解決方案。 最新的解決方案包括五合一硬件信任根模組PUFrt和安全加密處理器PUFiot。 憑藉我們成熟的產業資源,熵碼科技將在廣泛的製程技術平台上持續開發兼具卓越性能和成本效益的硬體安全解決方案。
欲瞭解更多資訊請至http://www.pufsecurity.com

關於晶心科技
晶心科技股份有限公司於2005年成立於新竹科學園區,2017年於台灣證交所上市(TWSE:6533)。晶心是RISC-V國際協會的創始首席會員,也是第一家採用RISC-V作為其第五代架構AndeStar™基礎的主流CPU供應商。為了滿足當今電子設備的嚴苛要求,晶心提供了高可配置性的32/64位元高效CPU核心,包含DSP,FPU,Vector,超純量(Superscalar)及多核心系列,可應用於各式SoC與應用場景。晶心並提供功能齊全的整合開發環境和全面的軟/硬體解決方案,可幫助客戶在短時間內創新其SoC設計。Andes-Embedded™ SoC的年出貨量在2020年,突破20億顆,而截至2020年底,累積出貨量已超過70億顆。
更多資訊請訪問www.andestech.com

關於RISC-V CON 
隨著萬物聯網時代來臨,RISC-V以開源特性、精簡架構以及可擴充的彈性配置,在全球掀起開源架構新浪潮。32/64位元嵌入式CPU核心供應商晶心科技布局RISC-V架構多年,為了進一步推廣RISC-V,將於6月3日於線上舉辦「RISC-V CON研討會」,以「RISC-V: The Rising Force」為主題,介紹開放式架構的創新特點如何改變半導體產業面貌,以及晶心如何協助客戶持續創新並成為市場領導者的成功案例;本次會議還邀請到重量級嘉賓進行專題演講及展覽,一同帶來最新生態系趨勢與相關產品應用資訊,包括晶心客戶Telink、Picocom以及合作夥伴IAR Systems、M31、Menta、PGC、Rambus、Secure IC、Simens、Skymizer等,熵碼科技也在RISC-V CON分享「晶片指紋實現更安全的晶片應用與服務」之主題演講。
免費註冊及更多資訊請訪問http://www.andestech.com/Andes_RISC-V_CON_2021_TW/

Continue Reading熵碼科技與晶心科技合作將安全處理器PUFiot導入RISC-V AIoT安全平台

採用晶心處理器架構的晶片 2020年出貨量突破20億顆

至2020年累積晶片出貨量達70億顆 屢創新高

【台灣新竹】2021年04月29日—提供32及64位元高效能、低功耗RISC-V處理器核心之全球領導供應商晶心科技,今日宣布於2020年度採用晶心處理器架構的系統晶片出貨量超過20億顆,較2019年出貨量成長33%,並且總累計出貨量超過70億顆。這些系統晶片被廣泛運用於音訊裝置、藍牙裝置、電玩遊戲、GPS、機器學習、MCU、感測器融合(sensor fusion) 、SSD控制器、觸控螢幕控制器、儲存裝置、語音辨識、無線充電等多元應用。

晶心科技執行長林志明表示:「雖然2020年全球受到疫情的影響,但嵌入晶心的SoC晶片,出貨量仍持續創歷史新高。根據統計,2020年20億顆的出貨量中,絕大多數為晶心處理器第三代架構,而於2017年底開始推出之RISC-V系列IP,也在2020年開始貢獻權利金,雖然所佔比例尚低,但是以IP產品壽命期長的特點,可以判斷,RISC-V產品的權利金,也將在未來十數年、甚至數十年內不斷對晶心的營收產生貢獻。晶心也持續在RISC-V陣營中布局,在RISC-V國際協會(RISC-V International)的董事會及技術指導委員會中,推進並主導RISC-V 技術規劃、商務戰略及生態系發展。」

晶心科技總經理暨技術長蘇泓萌博士則表示:「採用晶心第三代(V3)處理器解決方案的SoC,每日以將近550萬顆產量持續生產中。至於採用第五代(V5)RISC-V的晶片,2020年也已經有客戶進入量產;根據2021 Semico Research最新的預測,從2020年到2025年,RISC-V核心的年複合成長率將達到115%。RISC-V架構最大的特色就是模組化,擴充性佳及設計簡潔。目前晶心客戶的應用,在單一晶片上從只使用單核到超過1,000核都有,應用領域包括5G、人工智慧/機器學習、ADAS、AR/VR、區塊鏈、雲端運算、資料中心、物聯網、儲存裝置、安防、無線裝置等。晶心持續在RISC-V架構中保持技術領先地位,目前推出多款RISC-V系列處理器核心,設計上兼顧靈活運用及高效能低功耗的特性,並結合完整的軟體開發環境、計算庫、AI編譯器及開放安全框架等多項支援。隨著晶心的產品組合,涵蓋的應用更為廣泛,提供給客戶的選擇也更多元,將瞄準新興應用之不同需求,針對特定領域協助客戶打造最具競爭力的解決方案。」

Continue Reading採用晶心處理器架構的晶片 2020年出貨量突破20億顆

2021 RISC-V CON研討會新竹登場 聚焦RISC-V產業應用及發展

隨著萬物聯網時代來臨,RISC-V以開源特性、精簡架構以及可擴充的彈性配置,在全球掀起開源架構新浪潮。32/64位元嵌入式CPU核心供應商晶心科技布局RISC-V架構多年,為了進一步推廣RISC-V,將於5月27日在新竹國賓飯店舉辦年度RISC-V CON研討會,以「RISC-V: The Rising Force」為主題,介紹開放式架構的創新特點如何改變半導體產業面貌,以及晶心如何協助客戶持續創新並成為市場領導者的成功案例。

由於RISC-V適合5G、物聯網(IoT)、人工智慧(AI)、伺服器等熱門新興應用,逐漸成為指令集架構的主流標準。RISC-V國際協會(RISC-V International)會員已超過240家,包含國際知名系統公司、半導體公司、矽智財公司、軟硬體發展工具公司及柏克萊、MIT等名校。晶心科技身為RISC-V國際協會創始首席會員,致力於發展以RISC-V架構為基礎的創新處理器核心及開發平台,推出一系列高效能且低功耗的RISC-V處理器,包含DSP、FPU、Vector、超純量(Superscalar)及多核心系列,並與諸多合作夥伴通力合作,攜手建立RISC-V生態系及完善的產業鏈。

本次RISC-V CON開場將由晶心科技執行長暨RISC-V國際協會董事林志明以「RISC-V: A New Industry Standard」為題,從RISC-V國際觀點出發,分析RISC-V成為業界標準的原因、影響的應用領域及未來展望。晶心科技總經理暨技術長蘇泓萌則將主持研討會最後的Q&A,以RISC-V技術委員會副主席的身分來代表回覆關於RISC-V的最新技術發展動態。

整體研討會將分別從市場和研發的角度切入,聚焦RISC-V如何協助產業持續創新,並介紹加速RISC-V AI與IoT應用開發的晶心軟體解決方案,以及滿足客戶對於系統安全需求的開源安全框架AndeSentry。除此之外,本次會議還邀請到客戶及合作夥伴進行專題演講及現場攤位展示,像是IC設計公司泰凌微將介紹其採用RISC-V的物聯網解決方案,嵌入式安全IP領導廠商Silex Insight則將主講「Security Enclave Based on RISC-V」。其他贊助商包括國際知名編譯器軟體公司IAR Systems、矽智財開發商M31、設計服務公司PGC、安全IP授權大廠Rambus等等,也將一同帶來最新RISC-V生態系趨勢與相關產品應用資訊。

更多資訊請參考RISC-V CON活動網站:http://www.andestech.com/Andes_RISC-V_CON_2021_TW/

Continue Reading2021 RISC-V CON研討會新竹登場 聚焦RISC-V產業應用及發展