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Product Solution
  Multimedia

Multimedia is everywhere. It is with you at home, in your cars, or when you’re on the go. Multimedia content generally comes to devices thru broadcasting or from storage devices. At home, multimedia devices include DTV/Set-top-box/IPTV, DVD, home media centers, digital media adaptors, game machines, etc. In the cars, most home devices can be hidden behind the dashboard with different requirement. Hand-held multimedia devices which go with you range from PMP (portable media players), digital cameras/camcorders, cell phones, to game consoles.

In addition to content delivery mechanisms, the differences on the output granularity, power consumption, and cost also leads to the wide-range of requirements of multimedia devices. Home multimedia devices require higher and higher resolutions for video display, and this creates more pixels to be processed and transferred in the same amount of time. On the other hand, a low-cost cell phone may run software decoder using the CPU in its SoC for the small and low-resolution screen. Those multimedia devices are getting even more complicated when more and more media are converging together.

To help customers tackle the growing and diversified requirements in multimedia SoC’s, Andes offers AndeScore processor core family, associated software infrastructure and codec acceleration engines (thru partners):

Efficient processor architecture
  AndeStar 16-bit/32-bit inter-mixable instruction set: allows compiler to generate very compact code.
Audio acceleration instruction set: provide high-quality MP3 decode with low power consumption.
AndeScore-internal DMA engines – hide memory access latency while CPU is processing.
Flexible configuration – allows customers to choose the most efficient configuration for their applications.

Raw CPU performance
  AndeScore processor core family provides a wide range of performance based on core selection, targeted process and standard cell libraries.

Low power consumption

  AndeScores are all designed with extensive clock gating and advanced microarchitecture to reduce power. Also provided is a mechanism for customers to efficiently implement their power management.

Low total silicon cost

  AndeScores are designed with silicon cost in mind. Careful tradeoffs are made to achieve good performance/cost and power/cost. In addition, flexible configurability gives customers to add and drop hardware features based on their own tradeoffs. The efficient inter-mixable 16-bit/32-bit instruction set further reduces the code size for the smallest ROM cost and runtime footprint.

Powerful development tools

  standard features, plus profiling and tracing to reduce software development cycle and achieve fast product time-to-market.

Operating Systems

  Linux for full-featured systems and Nucleus for small footprint devices.

Audio/video codec
 
Audio codec using baseline instruction set: recommended when silicon cost is more important than power consumption.
Audio codec using acceleration instruction set: recommended when power consumption is more important than silicon cost.
Video codec using baseline instruction set: recommended when power consumption is not the most important factor and low resolution is needed.
Video codec using external (partners’) acceleration hardware: recommended for high resolution devices.

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