RISC-V CON Online is Coming!
RISC-V CON Series (English session, US)
Andes Custom Extension - Accelerating Domain-Specific Architecture
| Chinese: 2:00 PM (GMT+8) | English: 4:00 PM (GMT+9) | English: 9:00 AM (PDT) |
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Topics Covered in RISC-V CON
▶ The powerful AndesCore™ V5, D25, 27-series, 45-series
▶ The cutting edge Andes RISC-V vector extension processor
▶ The leading solution Andes Custom Extension™
▶ The diverse AI applications of RISC-V
▶ The latest market trends and technology of RISC-V
RISC-V CON Webinar Series
Lai Yu-Fan, Technical Manager
Tung Wei, Advanced Engineer
Introduction to Andes RISC-V CPU cores lineup, Andes Custom Extensions (ACE), software supports from bare metal to Linux, and Integrated Development Environment (IDE). People who join this webinar will learn what Andes could help designers to create highly competitive domain-specific SoCs easily.
Jimmy Shen, Senior Technical Manager
Niraj Dengale, Advanced Engineer
AndeSight™ integrated development environment provides a friendly software development interface when developing SoC with AndesCore™ CPUs. In the past 15 years, with customer feedback and continuous product improvement, AndeSight™ has developed comprehensive functions. As for AndeSoft™ BSP, it provides a wealth of software projects under the command line, such as toolchain, bare metal demo programs, RTOS/Linux and DSP library related software.
YiChiang Chang, Technical Manager
With greatly increase the requirements for domain-specific application from edge to cloud, designers are looking for hardware acceleration methods to fulfill their specific requirements. In this webinar, YiChiang will introduce Andes Custom Extension™ (ACE) to help Andes' customers convert the highly optimized Andes RISC-V V5 cores into domain-specific architecture to fulfill special acceleration. He will also cover the major features of ACE and COPILOT, and share some practical examples for designers to accelerate their specific SW applications or algorithm by creating custom instructions through ACE.